TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 3

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

3 o f 20 2
Section
List of Figures.......................................................................................................................................... 6
List of Tables ........................................................................................................................................... 7
List of Data Sheet Changes .................................................................................................................... 9
Applicable Standards Documentation ................................................................................................... 11
Overview ............................................................................................................................................... 12
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0 Operation..................................................................................................................................... 85
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
1.10
1.11
4.1
4.2
4.3
4.4
7.1
7.2
7.3
7.4
7.5
10.1
10.2
10.3
10.4
10.5
10.6
Features ...................................................................................................................................... 13
Block Diagram ............................................................................................................................. 17
Functional Model ......................................................................................................................... 18
Block Diagram Description .......................................................................................................... 19
Lead Diagram.............................................................................................................................. 21
Lead Descriptions........................................................................................................................ 22
Selected Parameter Values......................................................................................................... 45
Input, Output and Input/Output Parameters ................................................................................ 50
Timing Characteristics................................................................................................................. 54
10.1.1
10.1.2
10.2.1
10.2.2
10.3.1
10.3.2
10.3.3
10.4.1
Modes of Operation............................................................................................................. 13
Line Interface....................................................................................................................... 13
APS Port Interface............................................................................................................... 14
RS/Section Layer Processing.............................................................................................. 14
MS/Line Layer Processing .................................................................................................. 14
High Order Path Layer Processing...................................................................................... 15
High Order Path Cross Connect.......................................................................................... 15
Telecom Bus Interface ........................................................................................................ 16
Microprocessor Interface ..................................................................................................... 16
Testing................................................................................................................................. 16
Device Driver ....................................................................................................................... 16
Line Side ............................................................................................................................. 19
APS Port Side ..................................................................................................................... 19
High Order Path Cross Connect.......................................................................................... 20
Terminal Side ...................................................................................................................... 20
Absolute Maximum Ratings and Environmental Limitations................................................ 45
Thermal Characteristics ...................................................................................................... 45
Power Requirements ........................................................................................................... 46
Power Supply Sharing, Filtering and Other Requirements.................................................. 47
LVPECL I/O Recommendations: ......................................................................................... 47
Modes.................................................................................................................................. 85
Clock Architecture ............................................................................................................... 87
Reset ................................................................................................................................... 91
Powerup, Initialization and Startup ...................................................................................... 92
PRBS Generator and PRBS Analyzer................................................................................. 95
Line Interface....................................................................................................................... 96
Line Interface Mode .................................................................................................. 85
SDH/SONET Mapping .............................................................................................. 85
Clocks and Software-Access .................................................................................... 89
Loss of Clock Detection ............................................................................................ 91
External Lead Controlled Hardware Reset ............................................................... 91
Microprocessor Controlled Hardware Reset (RESETH)........................................... 91
Microprocessor Controlled Reset Per Clock Domain ............................................... 91
Powerup of the CDR/CS........................................................................................... 92
T
ABLE OF
PRELIMINARY TXC-06312B-MB, Ed. 2
PHAST-12N Device
C
ONTENTS
DATA SHEET
TXC-06312B
June 2005
Page