TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 44

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TXC-06312BIOG

Manufacturer Part Number
TXC-06312BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06312BIOG

Lead Free Status / Rohs Status
Supplier Unconfirmed
PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
BYPTXCLK
BYPTXC1
BYPTXDATA07
BYPTXDATA06
BYPTXDATA05
BYPTXDATA04
BYPTXDATA03
BYPTXDATA02
BYPTXDATA01
BYPTXDATA00
DEVHIGHZ
TEST1
PLLBYPASS
SCANEN
SCANMODE
Symbol
Symbol
SDH/SONET TRANSMIT BYPASS INTERFACE
TEST
Lead No.
Lead No.
AB5
AB4
AA5
AB3
AA4
AB2
W7
W6
C4
C3
D7
C6
Y6
Y5
A5
I/O/P
I/O/P
O
O
I
I
I
I
I
I
LVCMOS
LVCMOS
-
LVTTLd
LVTTLd
LVTTLd
LVTTLd
LVTTLd
LVTTL
Lead Descriptions
Type
Type
8mA
8mA
Transmit Line Bypass Clock:
For TranSwitch testing purposes.
This lead must be tied to VSS.
Transmit Line Bypass C1 Indication:
For TranSwitch testing purposes.
This lead must be left unconnected.
Transmit Line Bypass Data:
For TranSwitch testing purposes.
These leads must be left unconnected.
Device High-Z:
For TranSwitch testing purposes. All LVCMOS outputs
and all bi-dirs are tristated when this lead is high.
This lead must be tied to VSS.
TEST1:
For TranSwitch testing purposes.
This lead must be tied to VSS.
PLL Bypass:
For TranSwitch testing purposes.
This lead must be tied to VSS.
Scan Enable:
For TranSwitch testing purposes.
This lead must be tied to VSS.
Scan Mode:
For TranSwitch testing purposes.
This lead must be tied to VSS.
-
Name/Function
Name/Function
4 4 o f 2 0 2

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