TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 16

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
1.8 TELECOM BUS INTERFACE
1.9 MICROPROCESSOR INTERFACE
1.10 TESTING
1.11 DEVICE DRIVER
• Independent ADD and DROP bus
• 8-bit wide data bus
• 77.76 MHz clock
• SPE indication
• J0/C1 and J1 indication
• Optional V1 indication
• ADD bus timing modes:
• Bidirectional 16-bit wide Data bus (allowing 16-bit word accesses only)
• 14-bit wide Address bus
• The following microprocessor interface modes are supported:
• Interrupt request lead
• Interrupt mask bits for controlling generation of hardware interrupt requests
• Line loopbacks
• High order path loopbacks via the cross connect
• Boundary scan
• Device configuration
• Fault monitoring
• Performance monitoring
• ADD Slave mode: timing signals are inputs
• ADD Master mode: timing signals are outputs
• Generic Motorola mode
• Generic Intel mode (with separate address/data bus)
• MPC860 mode,
• MPC8260 Local Bus mode
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Features
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