TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 168

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
Offset
0x02C0
0x0280
0x0300
Bits
TOH_Events_Summ
ary
TOH_Events_Summ
ary_Mask
TOH_Events_LatchF
orInt
Name
Table 32: Receive TOH and DCC Port
-
Memory Maps and Bit Descriptions
All 0x0 ro
All 0x1 rw
All 0x0 cow_1
Init
Access
Array (4) of nine_bits
Offset between two elements = 0x2.
Array index indicates the summary of nine
TOH_Events_LatchedForInt bits.
Each bit corresponds to the summary of one entry in
TOH_Events_LatchForInt. Each entry of this array corresponds to
the summaries of all TOH byte events for the bytes with the same
interleave depth (STM-4 mode), or with the same line number
(STM-1 mode).
The array index and the bit position can be calculated as follows:
Array index = c-1
The correlation between bit position and TOH_Events_LatchForInt
entry is as follows:
A bit p corresponds to the summary of TOH Events entry (px4) + c.
where
See also [ITU-T G.707/Y.1322] for the TOH bytes locations.
Array (4) of nine_bits
Offset between two elements = 0x2.
Array index indicates the summary of nine
TOH_Events_LatchedForInt bits.
Summary mask of TOH Events. Refer to TOH_Events_Summary
descriptions for the layout of the bits.
Array (36) of nine_bits
Offset between two elements = 0x2.
Array index indicates the summary of nine TOH byte events.
Latched events on TOH bytes. Events occur if the TOH byte
content has a different value as the one in the previous frame. The
array index and the bit position within the corresponding entry can
be calculated as follows:
Array index = (a-1)x4 + c-1
Bit position = b-1
where
See also [ITU-T G.707/Y.1322] for the TOH bytes locations.
• a = row number (1 to 9)
• b = multi-column number (1 to 9)
• c, for STM-4 mode = depth of the interleave within the multi-
• c, for STM-1 mode = line number (1-4)
• p = bit position (0 to 8, least significant bit is 0)
• a = row number (1 to 9)
• b = multi-column number (1 to 9)
• c, for STM-4 mode = depth of the interleave within the multi-
• c, for STM-1 mode = line number (1-4)
column (1-4)
column (1-4)
(T_RX_TOH_DCC_PORT)
-
Description
1 6 8 o f 2 0 2