TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 35

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

3 5 o f 2 0 2
POHTXCLK
POHTXALE
POHTXA-
DDR
POHTXDLE
POHTXDATA
GPIN1
GPIN2
GPIN3
GPIN4
Symbol
Symbol
Lead No.
Lead No.
TRANSMIT HIGH ORDER POH BYTE INTERFACE
GENERAL PURPOSE INPUT/OUTPUT
M4
N1
N2
N3
U22
R20
R19
T21
T20
I/O/P
I/O/P
I
I
I
I
O
O
O
O
I
LVTTL
LVTTL
LVTTL
LVTTL
Type
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVTTL
16mA
Type
8mA
8mA
8mA
- Lead Descriptions -
General Purpose Input #1: Active high input, e.g., to monitor
the external electro/optical transceiver.
This input is mapped in a read-only register for software access.
When not used, this lead must be tied to VSS.
General Purpose Input #2: Active high input, e.g., to monitor
the external electro/optical transceiver.
This input is mapped in a read-only register for software access.
When not used, this lead must be tied to VSS.
General Purpose Input #3: Active high input, e.g., to monitor
the external electro/optical transceiver.
This input is mapped in a read-only register for software access.
When not used, this lead must be tied to VSS.
General Purpose Input #4: Active high input, e.g., to monitor
the external electro/optical transceiver.
This input is mapped in a read-only register for software access.
When not used, this lead must be tied to VSS.
Transmit HO POH Port Clock: The POHTXALE, POHTX-
DLE and POHTXADDR signals are clocked out on the falling
edges of this clock.
POHTXDATA is clocked in on the rising edge of this clock.
Its frequency is 77.76 MHz.
Transmit HO POH Port Address Latch Enable: An active
high, 8 POHTXCLK clock-cycle wide pulse indicating that a
valid address is present on POHTXADDR.
Transmit HO POH Port Address: The 8 consecutive states
clocked out while POHTXALE is high form the address of the
subsequent High Order POH byte requested on the POHTX-
DATA lead.
Transmit HO POH Port Data Latch Enable: An active high,
8 POHTXCLK clock-cycle wide pulse indicating that valid data
is present on POHTXDATA.
Transmit HO POH Port Data: The value of the High Order
POH byte requested by POHTXADDR is clocked in as the 8
consecutive states while POHTXDLE is high.
When the Transmit High Order POH Byte Interface is not
used, this lead must be tied to VSS.
Name/Function
Name/Function
PRELIMINARY TXC-06312B-MB, Ed. 2
PHAST-12N Device
DATA SHEET
TXC-06312B
June 2005