TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 165

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

1 6 5 o f 2 02
Offset
Offset
0x0000 15 - 0
0x0002 Detection_Config
0x0004 15 - 0
0x0006 Recovery_Config
0x0000
0x0100
0x0200
13.9 TOH GENERATOR
3 - 0
7 - 4
3 - 0
7 - 4
Bits
Bits
Table 28: Section Bursty Distribution BER Detection
DEG_DetectionErrorThreshold_
LSB
DEG_DetectionWindowSize
DEG_DetectionErrorThreshold_
MSB
DEG_RecoveryErrorThreshold_
LSB
DEG_RecoveryWindowSize
DEG_RecoveryErrorThreshold_
MSB
Common_Config
Line_Config
TTI_Contents
Name
Name
Table 29: TOH Generator
- Memory Maps and Bit Descriptions -
Init
All 0x0 rw
0xFFFF integer range 0 to 768000 (two addresses)
0xFFFF range 0 to 768000 (two addresses)
Init
0xA range 2 to 10
0xF integer range 0 to 768000 (two addresses)
0xF range 0 to 768000 (two addresses)
0x2 range 2 to 10
rw
rw
Access
Least significant bits of Detection Error Threshold.
An (one second) interval is bad if the number of detected errored
bits in that interval is greater than or equal to this threshold.
Number of consecutive bad intervals before DEG is declared.
Most significant bits of Detection Error Threshold.
An (one second) interval is bad if the number of detected errored
bits in that interval is greater than or equal to this threshold.
Least significant bits of Recovery Error Threshold.
An (one second) interval is a good interval when the number of
errored bits in this interval does not exceed this threshold.
Number of consecutive good intervals before DEG is cleared.
Most significant bits of Recovery Error Threshold.
An (one second) interval is a good interval when the number of
errored bits in this interval does not exceed this threshold.
(T_TOH_GENERATOR)
T_TOHG_Common_Config
General configuration.
Array (4) of T_TOHG_Line_Config
Offset between two elements = 0x8.
Array index indicates the line (= line number - 1).
Configuration.
Array (64) of byte
Offset between two elements = 0x2.
Array index indicates the TTI byte number.
This array contains the TTI sequence for the four lines:
Note: Bytes 16 to 63 are not used in STM-4 mode.
• bytes 0-15: TTI message for line 1
• bytes 16-31: TTI message for line 2
• bytes 32-47: TTI message for line 3
• bytes 48-63: TTI message for line 4
(T_Line_BIP_BurstyDetector_Config)
PRELIMINARY TXC-06312B-MB, Ed. 2
Description
Description
PHAST-12N Device
(See page
(See page
DATA SHEET
166)
TXC-06312B
167)
June 2005