TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 180

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TXC-06312BIOG

Manufacturer Part Number
TXC-06312BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06312BIOG

Lead Free Status / Rohs Status
Supplier Unconfirmed
PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
Offset
Offset
Offset
0x0000 2 - 0
0x0000 3 - 0
0x0000 7 - 0
0x0010
0x0018 7 - 0
0x0020
0x0028
0x0030
0x0038 15 - 0
0x0040
13.14 RECEIVE APS PORT
12 - 3
6 - 4
10 - 7
13 - 11
Bits
Bits
Bits
TxPLL_ChargePump
TxPLL_VCO
RxPLL_ChargePump
RxPLL_VCO
Common_Config
Expected_TTI_Message
CorrDefects_Unlatched
CorrDefects_LatchForInt
CorrDefects_Mask
APS_Info
PhaseInterpolator
DigitalLoopFilter
Reported_TTI_Message
B1_PM_Counter
Name
Name
Name
Table 56: CDR Tuning Configuration
Table 57: PLL Tuning Configuration
-
Table 58: Receive APS Port
Memory Maps and Bit Descriptions
Init
0x4A Reserved.
0x4 Reserved.
Init
Init
0x4 Reserved.
0x4 Reserved.
0x4 Reserved
0x0 rw
0x4 Reserved.
0x0 ro
0x0 ro
Set to 0x4 for STM-4/OC-12 application
Set to 0x1 for STM-1/OC-3 application
Set to 0x4a for STM-4/OC-12 application
Set to 0x5c for STM-1/OC-3 application
Set to 0x1 for External Timing.
Set to 0x4 for Line/Loop Timing and STM-4/OC-12 application
Set to 0x8 for Line/Loop Timing and STM-1/OC-3 application
Set to 0x1
Set to 0x4
Set to 0x1
rw
ro
cow_1
rw
Access
T_RX_APS_Common_Config
T_RX_APS_Defects
T_RX_APS_Defects
T_RX_APS_Defects
Array (4) of T_RX_APS_APSInfo
Received J0 byte.
General configuration.
Expected J0 byte.
Correlated defects.
Correlated defects latched for interrupt.
Correlated defects mask.
B1 performance counter.
Offset between two elements = 0x10.
Array index indicates the line (= line number - 1).
Received APS information.
(T_RX_APS)
-
(T_CDRTune)
(T_PLLTune)
Description
Description
(See page
(See page
(See page
Description
(See page
181)
181)
181)
(See page
181)
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