TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 8

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
41.
42.
43.
44.
45.
46.
47.
48.
49.
50.
51.
52.
53.
54.
55.
56.
57.
58.
59.
60.
61.
62.
63.
64.
65.
66.
67.
68.
69.
70.
71.
72.
73.
74.
75.
76.
77.
78.
79.
80.
81.
82.
83.
84.
85.
86.
87.
88.
89.
90.
91.
92.
93.
Pointer Justification Counters (T_HOPTRRT_PerfCounters) ....................................................................... 173
Pointer Tracker and Retimer Defects (T_HOPTRRT_Defects) .................................................................... 173
Retimer (T_RETIMER) ................................................................................................................................. 174
Retimer Defects (T_RT_Defects) ................................................................................................................. 174
Retimer Common Configuration (T_RT_Common_Config).......................................................................... 174
Retimer Per Path (T_RT_VCx) ..................................................................................................................... 175
Retimer Path Configuration (T_RT_VC3_TUG3_Config) ............................................................................. 175
Retimer Performance Counters (T_RT_PerfCounters) ................................................................................ 175
Clock Recovery/Clock Synthesis/SerDes (T_ANALOG) .............................................................................. 176
Test Configuration (T_TestControl) ............................................................................................................... 177
PRBS Configuration (T_XConnectPRBSControl)......................................................................................... 177
CDR/CS Configuration (T_ANALOG_Common_Config) .............................................................................. 178
High Speed Interface Power Down (T_PadPowerDown) ............................................................................. 179
Setup of Clock Recovery/Clock Synthesis/SerDes (T_CDR_CS_Setup)..................................................... 179
PLL Control (T_PLL_Control) ....................................................................................................................... 180
CDR Tuning Configuration (T_CDRTune) .................................................................................................... 181
PLL Tuning Configuration (T_PLLTune) ....................................................................................................... 181
Receive APS Port (T_RX_APS) ................................................................................................................... 181
Receive APS Port Common Configuration (T_RX_APS_Common_Config) ................................................ 182
Receive APS Port Defects (T_RX_APS_Defects)........................................................................................ 182
Receive APS Port Per Line (T_RX_APS_APSInfo)...................................................................................... 182
Receive APS Port Status (T_RX_APS_APSBytes_Status).......................................................................... 182
Receive APS Port Events (T_RX_APS_APSBytes_Event).......................................................................... 183
Cross Connect (T_VC_XCONNECT) ........................................................................................................... 183
Cross Connect Bus Configuration (T_XC_Bus_Config) ............................................................................... 183
Cross Connect Time Slot Configuration (T_XConnect_Config).................................................................... 184
Add Telecom Bus (T_DI_COMBUS)............................................................................................................. 184
Add Bus Common Defects (T_DICB_Global_CorrDefects).......................................................................... 185
Add Bus Defect Summary (t_dicb_VCx_CorrDefects_Summary) ................................................................ 185
Add Bus Common Configuration (T_DICB_Common_Config) ..................................................................... 185
Telecom Bus Path Configuration (T_VC3_TUG3_Mode_Config)................................................................. 185
Add Bus Path Defects (T_DICB_VCx_CorrDefects) .................................................................................... 186
Path Ring Port/Alarm Interface (T_HO_POH_RING_PORT) ....................................................................... 186
Path Ring Port/Alarm Interface Common Configuration (T_HOPR_Common_Config) ................................ 186
Path Ring Port/Alarm Interface Defects (T_HOPR_Defects)........................................................................ 186
Path Ring Port/Alarm Interface Path Configuration (T_HOPR_VC_Config)................................................. 187
JTAG Master (T_JTAG_MASTER) ............................................................................................................... 187
Drop Telecom Bus (T_DO_COMBUS).......................................................................................................... 188
Drop Bus Path Configuration (T_DOCB_VC3_TUG3_Config) ..................................................................... 188
Drop Bus Common Configuration (T_DOCB_Common_Config).................................................................. 188
Drop Bus AUG-1 Configuration (T_DOCB_AUG1_Config) .......................................................................... 189
POH Monitor (T_VC_POH_MONITOR)........................................................................................................ 189
POH Monitor Path Configuration (T_VCXPM_Config) ................................................................................. 190
POH Monitor Expected J1/C2 (T_VCXPM_ExpectedBytes) ........................................................................ 191
BER Detection Configuration (T_BIP_Detector_Config) .............................................................................. 191
Path Bursty Distribution BER Detection (T_BIP_BurstyDetector_Config) .................................................... 191
POH Monitor Defects (T_VCXPM_Defects) ................................................................................................. 192
POH Monitor Common Configuration (T_VCXPM_Common_Config).......................................................... 192
POH Monitor Status (T_VCXPM_Common_Status)..................................................................................... 194
J1 TTI Stable (T_VCXPM_Report) ............................................................................................................... 194
POH Monitor Per Path (T_VCXPM_Status) ................................................................................................. 194
POH Monitor Path Status (T_VCXPM_POH_Status) ................................................................................... 195
POH Monitor Performance Counters (T_VCXPM_PM) ................................................................................ 195
8 o f 2 0 2