TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 4

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TXC-06312BIOG

Manufacturer Part Number
TXC-06312BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06312BIOG

Lead Free Status / Rohs Status
Supplier Unconfirmed
PRELIMINARY TXC-06312B-MB, Ed. 2
June 2005
PHAST-12N Device
DATA SHEET
TXC-06312B
11.0 High Order Pointer Tracking, Retiming and Pointer Generation ............................................... 112
12.0 Telecom Bus ............................................................................................................................. 131
10.7
10.8
10.9
10.10 High Order Cross Connect ................................................................................................ 102
10.11 Automatic Protection Switching ......................................................................................... 103
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10 High Order POH Port Interface.......................................................................................... 126
11.11 High Order Alarm Indication (Ring) Port Interface............................................................. 128
12.1
12.2
10.7.1
10.7.2
10.8.1
10.8.2
10.9.1
10.9.2
10.11.1
10.11.2
10.11.3
10.11.4
10.11.5
10.11.6
10.11.7
10.11.8
11.3.1
11.3.2
11.6.1
11.6.2
11.7.1
11.7.2
11.8.1
11.8.2
11.9.1
11.9.2
11.10.1
11.10.2
11.11.1
11.11.2
12.1.1
12.1.2
12.1.3
12.2.1
12.2.2
12.2.3
APS Interface ...................................................................................................................... 96
Regenerator Section (section) Overhead Processing ......................................................... 98
Multiplex Section (line) Overhead Processing................................................................... 100
Line and APS Side Pointer Tracking, Retiming and Pointer Generation........................... 112
Detection of Concatenated Structures............................................................................... 112
Frame Reference Pulses................................................................................................... 113
Terminal Side Retiming and Pointer Generation ............................................................... 114
Retimer FIFO Leak Registers............................................................................................ 114
High Order Path Overhead Processing ............................................................................. 115
TOH Port Interface ............................................................................................................ 121
DCC Port Interface ............................................................................................................ 122
Line Alarm Indication (Ring) Port Interface........................................................................ 124
Drop Bus Interface............................................................................................................. 131
Add Bus Interface .............................................................................................................. 132
APS Interface Generator .......................................................................................... 97
APS Interface Monitor............................................................................................... 97
Regenerator Section Overhead Generator............................................................... 98
Regenerator Section Overhead Monitor ................................................................... 99
Multiplex Section Overhead Generator................................................................... 100
Multiplex Section Overhead Monitor....................................................................... 100
Single Device Operation ......................................................................................... 103
Dual Device Operation............................................................................................ 103
APS Port Architecture............................................................................................. 104
Example: STM-4/OC-12 Mode, 1+1 APS Protection .............................................. 105
Example: STM-4/OC-12 Mode, 1:1 APS Protection ............................................... 106
Example: STM-1 Mode, 1+1 APS Protection.......................................................... 107
Example: STM-1 Mode, 1:1 APS Protection........................................................... 108
Example: STM-1 Mode, 1:n APS Protection........................................................... 110
Generation of Frame Reference Pulse ................................................................... 113
Locking on External Frame Reference Pulse ......................................................... 113
High Order Path Overhead Generator.................................................................... 115
High Order Path Overhead Monitor ........................................................................ 117
Transmit TOH Port Interface................................................................................... 121
Receive TOH Port Interface.................................................................................... 122
Transmit DCC Port Interface .................................................................................. 122
Receive DCC Port Interface ................................................................................... 123
Internal Line Alarm Indication (Ring) Port Interface................................................ 124
External Line Alarm Indication (Ring) Port Interface............................................... 125
Transmit High Order POH Port Interface................................................................ 127
Receive High Order POH Port Interface................................................................. 128
Internal High Order Alarm Indication (Ring) Port Interface ..................................... 129
External High Order Alarm Indication (Ring) Port Interface.................................... 130
Drop Bus Parity Selection....................................................................................... 131
Drop Bus Delay....................................................................................................... 132
Drop Bus High Impedance...................................................................................... 132
Add Bus Timing Modes........................................................................................... 133
Add Bus Parity Selection ........................................................................................ 133
Add Bus Delay ........................................................................................................ 134
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