ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 95

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.3.3
The system clock can be switched between high-speed clock (HSCLK) and low-speed clock (LSCLK) by using the
frequency control registers (FCON0, FCON1).
Figure 6-6 shows the flow chart of system clock switching processing (HSCLK to LSCLK) and Figure 6-7 shows the
flow chart of system clock switching processing (LSCLK to HSCLK).
Note:
Note:
Immediately after the recovery from the STOP mode, if the system clock is switched from HSCLK to LSCLK, the
CPU becomes inactive until LSCLK starts clock supply to the peripheral circuits. Therefore, It is recommended to
switch to LSCLK after confirming that the LSCLK is oscillating by checking that the time base counter interrupt
request bit (Q128H) is “1”.
If the system clock is switched from a low-speed clock to a high-speed clock before the high-speed clock (HSCLK)
starts oscillation, the CPU becomes inactive until HSCLK starts clock supply to the peripheral circuits.
Switching of System Clock
System clock switching
System clock switching
Figure 6-6 Flow of System Clock Switching Processing (HSCLK to LSCLK)
Figure 6-7 Flow of System Clock Switching Processing (LSCLK to HSCLK)
Wait the oscillation
stabilization time
operation mode
operation mode
SYSCLK←”0”
SYSCLK←”1”
Is high-speed
ENOSC←”0”
ENOSC←”1”
clock used?
High-speed
Low-speed
Yes
(T
WAIT
)
No
T
Switches the system clock (high-speed clock to low-speed clock)
Stops high-speed oscillation
(* Not needed to stop in the case when the high-speed clock
is used by something other than the CPU)
Switches the system clock (low-speed clock to high-speed clock)
High-speed oscillation start
WAIT
Continue to use the low-speed clock (LSCLK).
=500μs
6-9
ML610Q407/ML610Q408/ML610Q409 User's Manual
Chapter 6 Clock Generation Circuit