ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 331
ML610Q409-NNNTBZ03A7
Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q407P-NNNTB03A7.pdf
(33 pages)
3.ML610Q407P-NNNTB03A7.pdf
(391 pages)
Specifications of ML610Q409-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
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22.3 Description of Operation
22.3.1 Operation of LCD Drivers and Bias Generation Circuit
Figure 22-6 shows the operation of the LCD drivers and the bias generation circuit.
① System reset causes the bias generation circuit and the LCD drivers to stop operation and V
② By using the bias circuit control register (BIASCON), select 1/2 bias or 1/3 bias and select the bias voltage
③ When the programmable display allocation function is used, set LCD allocation data in the display allocation
④ Set a frame frequency and a duty by using the display mode register 0 (DSPMOD0). When using the
⑤ Set display data in the display registers (DSPR00 to DSPR27).
⑥ On the display control register (DSPCON), set the LMD1 and LMD0 bits to the display mode. (Display
Internal BIAS ON Signal
to each of the common and segment pins.
multiplying clock.
registers (DS0C0 to DS39C4).
programmable display allocation function, set the DSPMOD1 register's DASN bit to"1". When not using the
programmable display allocation function, set the DSPMOD1 register's DASN bit to"0".
waveform is output to each segment pin.)
LCD bias voltage
Common output
Segment output
SEG0∼SEG39
COM0∼COM4
LMD1, LMD0
RESET_N
V
Figure 22-6 Operation of LCD Drivers and Bias Generation Circuit
Reset
L1
∼V
L3
V
V
SS
SS
22-19
ML610Q407/ML610Q408/ML610Q409 User's Manual
Generation of LCD bias voltage
Common Output Waveforms
Segment Output Waveform
Chapter 22 LCD Drivers
SS
level to be output
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