ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 9

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ML610Q409-NNNTBZ03A7

Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q409-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
Chapter 11
11. Watchdog Timer............................................................................................................................................................. 11-1
Chapter 12
12 Synchronous Serial Port .................................................................................................................................................... 12-1
10.3 Description of Operation .......................................................................................................................................... 10-8
10.4 Specifying port registers ........................................................................................................................................ 10-10
11.1 Overview .................................................................................................................................................................. 11-1
11.2 Description of Registers ........................................................................................................................................... 11-2
11.3 Description of Operation .......................................................................................................................................... 11-5
12.1 O
12.2 Description of Registers ............................................................................................................................................. 12-2
12.3 Description of Operation .......................................................................................................................................... 12-10
12.4 Specifying port registers ........................................................................................................................................... 12-15
10.2.6 PWM0 Control Register 1 (PW0CON1) .......................................................................................................... 10-7
10.4.1 Functioning the P43 pin (PWM0) as the PWM output................................................................................... 10-10
10.4.2 Functioning the P24 pin (PWM0) as the PWM output................................................................................... 10-11
10.4.3 Operating PWM0 with External Clock (P04/T02P0CK)................................................................................ 10-12
10.4.4 Operating PWM0 with External Clock (P44/T02P0CK)................................................................................ 10-13
11.1.1 Features............................................................................................................................................................. 11-1
11.1.2 Configuration .................................................................................................................................................... 11-1
11.2.1 List of Registers ................................................................................................................................................ 11-2
11.2.2 Watchdog Timer Control Register (WDTCON) ............................................................................................... 11-3
11.2.3 Watchdog Timer Mode Register (WDTMOD) ................................................................................................. 11-4
11.3.1 Handling example when you do not want to use the watch dog timer ............................................................11-7
12.1.1 Features................................................................................................................................................................ 12-1
12.1.2 Configuration...................................................................................................................................................... 12-1
12.1.3 List of Pins.......................................................................................................................................................... 12-2
12.2.1 List of Registers .................................................................................................................................................. 12-2
12.2.2 Serial Port 0 Transmit/Receive Buffers (SIO0BUFL and SIO0BUFH).............................................................. 12-3
12.2.3 Serial Port 1 Transmit/Receive Buffers (SIO1BUFL and SIO1BUFH).............................................................. 12-4
12.2.4 Serial Port 0 Control Register (SIO0CON) ........................................................................................................ 12-5
12.2.5 Serial port 1 Control Register (SIO1CON)......................................................................................................... 12-5
12.2.6 Serial Port 0 Mode Register 0 (SIO0MOD0) ..................................................................................................... 12-6
12.2.7 Serial Port 1 Mode Register 0 (SIO1MOD0) ..................................................................................................... 12-7
12.2.8 Serial Port 0 Mode Register 1 (SIO0MOD1) ..................................................................................................... 12-8
12.2.9 Serial Port 1 Mode Register 1 (SIO1MOD1) ..................................................................................................... 12-9
12.3.1 Transmit Operation ......................................................................................................................................... 12-10
12.3.2 Receive Operation .......................................................................................................................................... 12-12
12.3.3 Transmit/Receive Operation ........................................................................................................................... 12-14
12.4.1 Functioning P42 (SOUT0: Output), P41 (SCK0: Input/Output), and P40 (SIN0: Input) as the SSIO0/
“Master mode”.............................................................................................................................................................. 12-15
12.4.2 Functioning P42 (SOUT0: Output), P41 (SCK0: Input/Output), and P40 (SIN0: Input) as the
SSIO0/ ”Slave mode” ................................................................................................................................................... 12-16
12.4.3 Functioning P46 (SOUT0: Output), P45 (SCK0: Input/Output) and P44 (SIN0 : Input) as the
SSIO0/ ”Master mode” ................................................................................................................................................. 12-17
12.4.4 Functioning P46 (SOUT0: Output), P45 (SCK0: Input/Output) and P44 (SIN0 : Input) as the
SSIO0/ ”Slave mode” ................................................................................................................................................... 12-18
12.4.5 Functioning P52 (SOUT1: Output), P51 (SCK1: Input/Output), and P50 (SIN1: Input) as the SSIO1/
“Master mode”.............................................................................................................................................................. 12-19
12.4.6 Functioning P52 (SOUT1: Output), P51 (SCK1: Input/Output), and P50 (SIN1: Input) as the
VERVIEW
................................................................................................................................................................... 12-1
Contents –4
ML610407/ML610408/ML610409 User’s Manual
Contents

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