ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 150

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ML610Q409-NNNTBZ03A7

Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q409-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
10. PWM
10.1 Overview
10.1.1 Features
10.1.2 Configuration
This LSI includes one channel of 16-bit PWM (Pulse Width Modulation).
The PWM output (PWM0) is assigned to the tertiary function of the P43 (Port 4) or the secondary function of the P24
(Port 2). For the functions of Port 4 and Port 2, see Chapter 17, “Port 4” and Chapter 15, “Port 2”.
• Capable of generating and externally outputting a PWM signal at a cycle ranging from 2000ns (@HTBCLK =
• The output logic of the PWM signal can be switched to the positive or negative logic.
• At the coincidence of PWM signal period, duties, and period & duty, a PWM interrupt (PW0INT) occurs.
• For the PWM clock, a low-speed clock (LSCLK), a high-speed time base clock (HTBCLK), and an external clock
are available.
(*) For HSCLK 2MHz, the cycle ranges from 500ns (@HTBCLK=2MHz) to 2s (@LSCLK=32.768kHz).
Figure 10 - 1 shows the configuration of the PWM circuit.
P04/T02P0CK
P44/T02P0CK
External clock
500kHz) to 2s (@LSCLK = 32.768kHz)(*)
PW0PL
PW0PH
PW0PBUF : PWM0 period buffer
PW0DL
PW0DH
PW0DBUF : PWM0 duty buffer
PW0CL
PW0CH
PW0CON0 : PWM0 control register 0
PW0CON1 : PWM0 control register 1
Read PW0CL
Write PW0CH
HTBCLK
Write PW0CL
Data bus
LSCLK
: PWM0 period register L
: PWM0 period register H
: PWM0 duty register L
: PWM0 duty register H
: PWM0 counter register L
: PWM0 counter register H
PW0CON0
PW0CON1
Figure 10-1 Configuration of PWM Circuit
P0CK
P0FLG
PW0CH
R
latch
10-1
PW0CH/L
8
ML610Q407/ML610Q408/ML610Q409 User's Manual
16
8
P0NEG
Comparator
PW0PBUF
PW0PH/L
Output control
Cycle
Matched
8
circuit
16
8
Comparator
PW0DBUF
PW0DH/L
Duty
Matched
8
PW0INT
16
Chapter 10 PWM
8
P43/PWM0
P24/PWM0

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