ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 296

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ML610Q409-NNNTBZ03A7

Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q409-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
ML610Q407/ML610Q408/ML610Q409 User's Manual
Chapter 21 RC Oscillation Type A/D Converter
21.2.4 RC-ADC Mode Register (RADMOD)
Address: 0F308H
Access: R/W
Access size: 8-bit
Initial value: 00H
RADMOD is a special function register (SFR) used to select the A/D conversion mode of the RC-ADC.
[Description of Bits]
Note:
Initial value
RADMOD
When specifying LSCLK x 2 for the base clock, enable the operation of the low-speed double clock by setting bit 2
(ENMLT) of the frequency control register 1 (FCON1) to “1”.
R/W
OM3-0 (bits 3 to 0)
RADI (bit 4)
RACK2-0 (bits 7 to 5)
The OM3–0 bits are used to select an oscillation mode for the RC oscillator circuits.
The RADI bit is used to choose whether to generate the RC-ADC interrupt request signal (RADINT) by an
overflow at Counter A or Counter B.
The RACK2 to RACK0 bits are used to select the base clock of Counter A (BSCLK).
RACK2
OM3
RADI
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
1
0
1
RACK2
R/W
7
0
RACK1
OM2
Generates an interrupt request by Counter A overflow (initial value).
Generates an interrupt request by Counter B overflow.
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
*
RACK1
R/W
6
0
RACK0
OM1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
*
*
RACK0
R/W
LSCLK (initial value)
LSCLK×2
HSCLK
1/2HSCLK
1/4HSCLK
1/8HSCLK
Setting prohibited (no clock is supplied)
5
0
OM0
0
1
0
1
0
1
0
1
*
21-6
RADI
IN0 pin external clock input mode (initial value)
RS0-CS0 oscillation mode
RT0–CS0 oscillation mode
RT
RS0–CT0 oscillation mode
RS1–CS1 oscillation mode
RT1–CS1 oscillation mode
IN1 pin external clock input mode
Prohibited
R/W
4
0
0-1
Description
–CS0 oscillation mode
OM3
R/W
Description
3
0
Description
OM2
R/W
2
0
OM1
R/W
1
0
OM0
R/W
0
0

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