ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 94

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ML610Q407/ML610Q408/ML610Q409 User's Manual
Chapter 6 Clock Generation Circuit
6.3.2.2 Operation of High-Speed Clock Generation Circuit
The high-speed clock generation circuit allows the start/stop control of oscillation by using the frequency control
registers 0 and 1 (FCON0 and FCON1).
Oscillation can be started by setting the ENOSC bit of FCON1 to "1" after selecting a high-speed oscillation frequency
with FCON0. After the start of oscillation, HSCLK starts supply of a clock to the peripheral circuits following the elapse
of the high-speed oscillation start period (T
(OSCLK).
The high-speed clock generation circuit stops oscillation when it shifts to the STOP mode by software. When the STOP
mode is released by external interrupt, HSCLK supplies clocks to peripheral circuits following the elapse of the
high-speed oscillation start period (T
oscillation stabilization time is for 16 clocks.
Figure 6-5 shows the waveforms of the high-speed clock generation circuit.
oscillation enabled
Low-Speed Clock
High-speed clock
High-speed
High-speed
oscillation
waveform
oscillation
waveform
ENOSC
HSCLK
clock
High-speed
oscillation
Figure 6-5 Operation of High-Speed Clock Generation Circuit
started
High-speed oscillation 16 counts
T
RC
: High-speed oscillation start time
Low-speed clock oscillation waveform
High-speed oscillation waveform
RC
) and the oscillation stabilization time of the high-speed clock (OSCLK). The
HSCLK waveform
RC
) and the oscillation stabilization time of the high-speed oscillation clock
6-8
STOP
mode
occurred
External
interrupt
T
T
RC
XTL
High-speed oscillation 16 counts
Low-speed oscillation 8192 counts
: High-speed oscillation start time
: Low-speed oscillation start time
Program restarted time depends
on the SYSCLK bit
High-speed oscillation waveform
HSCLK waveform
Low-speed clock oscillation waveform
High-speed
oscillation
Stop