ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 50

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 4 MCU Control Function
4.2.3
Address: 0F009H
Access: W
Access size: 8-bit
Initial value: 00H
SBYCON is a special function register (SFR) to control operating mode of MCU.
[Description of Bits]
Note:
Initial value
SBYCON
•
•
The mode cannot be changed to HALT mode or STOP mode on the condition of that both any interrupt enable flag
and the corresponding interrupt request flag are “1”(An interrupt request occurrence with resetting MIE flag will
have the condition).
When a maskable interrupt source (interrupt with enable bit) occurs while the MIE flag of the program status word
(PSW) in the nX-U8/100 core is “0”, the STOP mode and the HALT mode are simply released and interrupt
processing is not performed. For details of PSW, see “nX-U8/100 Core Instruction Manual”.
Standby Control Register (SBYCON)
W
STP (bit 1)
HLT (bit 0)
The STP bit is used for setting the STOP mode. When the STP bit is set to “1” with the stop code adapter
enabled by using STPACP, the mode is changed to the STOP mode. When any of the P00 to P04 interrupt
requests enabled by the Interrupt Enable Register 1 (IE1) occurs or an external 8 interrupt request enabled by the
Interrupt Enable Register 2 (IE2) occurs, the STP becomes "0" and the operation returns to the program run
mode.
The HALT bit is used for setting a HALT mode. When the HALT bit is set to “1”, the mode is changed to the
HALT mode. When the WDT interrupt request or enabled (the interrupt enable flag is “1”) interrupt request is
issued, the HALT bit is set to “1” and the mode is returned to program run mode.
STP
0
0
1
1
—
W
7
0
HLT
0
1
0
1
—
W
6
0
Program run mode (initial value)
HALT Mode
STOP mode
Prohibited
—
W
5
0
4-4
—
W
4
0
Description
—
W
3
0
—
W
2
0
STP
W
1
0
HLT
W
0
0