ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 315
ML610Q409-NNNTBZ03A7
Manufacturer Part Number
ML610Q409-NNNTBZ03A7
Description
MCU 8BIT 16K FLASH 4CH 100-TQFP
Manufacturer
Rohm Semiconductor
Series
-r
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q407P-NNNTB03A7.pdf
(33 pages)
3.ML610Q407P-NNNTB03A7.pdf
(391 pages)
Specifications of ML610Q409-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
2MHz
Connectivity
SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.25 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q409-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
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22.1.1 Features
22.1.2 Configuration of the LCD Drivers
The LCD drivers are applicable to various types of LCD panels.
The programmable display allocation function facilitates software display processing. By using “ALL LCDs on mode” and
“ALL LCDs off mode”, LCD panel inspection processing software can be easily created.
Figure 22-4 shows the configuration of the LCD drivers and the bias generation circuit.
V
• ML610Q409: 185 dots max. (37 segments x 5 commons)
• ML610Q408: 165 dots max. (33 segments x 5 commons)
• ML610Q407: 145 dots max. (29 segments x 5 commons)
• 1/1 to 1/5 duty
• 1/2 or 1/3 bias (built-in bias generation circuit)
• Frame frequency selectable (4 types)
• Bias voltage multiplying clock selectable (8 types)
• Programmable display allocation function
Cl
C
DD
Cb
Cc
12
BIASCON
DSPMOD0
DSPMOD1
DSPCON
DSmCn
DSPR00 - DSPR27 : Display registers
V
V
V
V
C2
C1
V
V
DDL
L3
L2
L1
SS
DD
Figure 22-4 Configuration of LCD Drivers and Bias Generation Circuit
generation
regulator
circuit
Voltage
circuit
Bias
: Bias circuit control register
: Display mode register 0
: Display mode register 1
: Display control register
: Allocation register (m = 0 to 39, n = 0 to 4)
BIASCON
COM0
Common
22-3
Driver
DSPMOD0
DSPMOD1
DSPCON
ML610Q407/ML610Q408/ML610Q409 User's Manual
COM1∼4
DSPR00 –
DSPR27
SEG0
Display allocation
control circuit
Segment
Driver
SEG39∼36
DSmCn
Chapter 22 LCD Drivers
Data bus
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