ML610Q409-NNNTBZ03A7 Rohm Semiconductor, ML610Q409-NNNTBZ03A7 Datasheet - Page 92

• Manufacturer Part Number: ML610Q409-NNNTBZ03A7
• Description: MCU 8BIT 16K FLASH 4CH 100-TQFP
• Manufacturer: Rohm Semiconductor
• Series: -r

Specifications of ML610Q409-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.25 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 100-TFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ML610Q407/ML610Q408/ML610Q409 User's Manual
Chapter 6 Clock Generation Circuit
6.3.1.2 Operation of Low-Speed Clock Generation Circuit
Low-speed oscillator
oscillation waveform
The low-speed clock generation circuit is activated by the occurrence of power ON reset.
After the power-on, it waits for the low-speed oscillation start time (T
stabilization time (8192 counts). Then, the mode moves to the program run mode, the CPU starts operation, and at the
same time the low-speed clock (LSCLK) is supplied to the peripheral circuits.
The low-speed clock generation circuit stops oscillation when it shifts to the STOP mode by software. When oscillation
is resumed by releasing of the STOP mode by external interrupt, LSCLK is supplied to the peripheral circuits after the
elapse of the low-speed oscillation start period (T
counts). For STOP mode, see Chapter 4, “MCU Control Function”.
Figure 6-3 shows the waveforms of the low-speed clock generation circuit. For the low-speed oscillation start time
(T
Note:
Low-Speed Clock
Low-Speed Clock
circuit start signal
XTL
After the power supply is turned on, CPU starts operation with the low-speed clock. After the STOP mode is released,
the CPU starts operation with the low-speed clock (SYSCLK bit = "0") or high-speed clock (SYSCLK bit = "1")
depending on the FCON1's SYSCLK bit.
), see Appendix C, “Electrical Characteristics”.
RESET_VRX
System clock
supply V
SYSCLK
RESET
Power
LSCLK
DD
Figure 6-3 Operation of Low-Speed Clock Generation Circuit
T
XTL
: Oscillation start time
Low-speed oscillation
Low-speed
oscillation
4096 counts
8192 counts
LSCLK supply started
Low-speed clock oscillation waveform
and CPU started
XTL
) and low-speed clock (LSCLK) oscillation stabilization time (8192
6-6
SYSCLK waveform
LSCLK waveform
External interrupt
STOP
mode
occurred
XTL
T
) and the low-speed clock (LSCLK) oscillation
XTL
: Oscillation start time
Low-speed oscillation
Low-speed
oscillation
4096 counts
Low-speed clock oscillation waveform
8192 counts
LSCLK supply started
and CPU started
SYSCLK waveform
LSCLK waveform