ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 626
ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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8.1.5.3
In Table 8-8 on page 622, the note “s-i-b is present” for certain entries forces the use of the mod and base field as listed in
Table 8-15. The first two digits in the first column of Table 8-15 identify the mod bits in the mod r/m byte. The last three digits
in the second column of this table identify the base fields in the s-i-b byte.
626
mod Field within mod/rm
Byte (bits[7:6])
Base Field (s-i-b Present)
00
00
00
00
00
00
00
00
01
01
01
01
01
01
01
01
10
10
10
10
10
10
10
10
33234H
base Field within s-i-b
Byte (bits [2:0])
Table 8-15. mod base Field Encoding
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
32-Bit Address Mode with mod r/m and s-i-b
Bytes Present
DS:[EAX+(scaled index)]
DS:[ECX+(scaled index)]
DS:[EDX+(scaled index)]
DS:[EBX+(scaled index)]
SS:[ESP+(scaled index)]
DS:[d32+(scaled index)]
DS:[ESI+(scaled index)]
DS:[EDI+(scaled index)]
DS:[EAX+(scaled index)+d8]
DS:[ECX+(scaled index)+d8]
DS:[EDX+(scaled index)+d8]
DS:[EBX+(scaled index)+d8]
SS:[ESP+(scaled index)+d8]
SS:[EBP+(scaled index)+d8]
DS:[ESI+(scaled index)+d8]
DS:[EDI+(scaled index)+d8]
DS:[EAX+(scaled index)+d32]
DS:[ECX+(scaled index)+d32]
DS:[EDX+(scaled index)+d32]
DS:[EBX+(scaled index)+d32]
SS:[ESP+(scaled index)+d32]
SS:[EBP+(scaled index)+d32]
DS:[ESI+(scaled index)+d32]
DS:[EDI+(scaled index)+d32]
AMD Geode™ LX Processors Data Book
Instruction Set
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