ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 372
ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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6.6.19.27 Line Compare
Index
Type
Reset Value
6.6.19.28 CPU Data Latch State
Index
Type
Reset Value
6.6.19.29 Attribute Index/Data FF State
Index
Type
Reset Value
372
Bit
7:0
Bit
7:0
Bit
6:0
7
Name
LINE_COMP[7:0]
Name
DLV
Name
FFST
RSVD
18h
R/W
00h
22h
RO
00h
24h
RO
00h
33234H
Attribute Index/Data FF State Register Bit Descriptions
Description
Data Latch Value. This read only field returns a byte of the CPU data latches and can be
used in VGA save/restore operations. The graphics controller’s Read Map Select field
(Index 04h[1:0]) specifies which byte/map (0-3) is returned.
Description
FF State. This read only bit indicates the state of the attribute controller index/data flip-
flop. When this bit is 0, the next write to Index 3C0h will write an index value; when this
bit is 1, the next write to Index 3C0h will write a data register value.
Reserved.
CPU Data Latch State Register Bit Descriptions
Description
Line Compare Register Bits [7:0]. This value specifies the low eight bits of a compare
value that represents the scan line where the CRTC frame buffer address counter is
reset to 0. This can be used to create a split screen by using the Start Address registers
to specify a non-zero location at which to begin the screen image. The lower portion of
the screen (starting at frame buffer address 0) is immune to screen scrolling (and pel
panning as specified in the Attribute Mode Control register (Index 10h). Line Compare is
a 10-bit value. Bit 8 is located in the Overflow register (Index 07h[4]) and bit 9 is in the
Maximum Scan Line register (Index 09h[6]).
Line Compare Register Bit Descriptions
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book
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