ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 609
ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Electrical Specifications
Note 1. The GNT[2:0]#, IRQ13, SUSPA#, PW0, and PW1 signals are only inputs during RESET# active. They must be sta-
Note 2. Output delay includes tristate-to-valid transitions and valid-to-tristate timing.
AMD Geode™ LX Processors Data Book
Symbol
t
t
t
t
t
SU1
SU2
H
VAL1
VAL2
ble between five and two PCI clocks before RESET# inactive.
Parameter
Input Setup time to SYSREF
(AD[31:0], DEVSEL#,GNT[2:0]#, IRDY#, PAR,
STOP#, TRDY#)
REQ[2:0]# Input Setup time to SYSREF
Input Hold time from SYSREF for all PCI inputs
(STOP#)
(DEVSEL#, FRAME#, GNT[2:0#, IRDY#, PAR,
TRDY#, REQ[2:0]#, STOP#)
Bused signals Valid Delay time from SYSREF
(AD[31:0])
GNT[2:0]# Valid Delay time from SYSREF
V
Figure 7-5. Drive Level and Measurement Points for Switching Characteristics
SYSREF
RESET#
IO
MVREF
Outputs
V
SYSREF
,V
Outputs
CORE
MEM
Inputs
Valid Output
t
VAL1,2
Figure 7-4. Power Up Sequencing
Min
Table 7-9. PCI Interface Signals
t
ON
n
t
MVON
t
SU1,2
t
VAL1,2
t
RSTX
Valid Input
Valid Output
Max
t
Z
Min
3.0
4.5
2.0
2.0
0
n+1
Max
t
6.0
5.5
H1,2
33234H
50%
Unit
50%
ns
ns
ns
ns
ns
50%
Comments
Note 1
Note 2
Note 2
SYSREF
cycle time not
to scale with
other delays
in this figure.
609
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