ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 322

• Manufacturer Part Number: ALXD800EEXJCVD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJCVD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.6.4.2
DC Memory Offset 014h
Type
Reset Value
This register specifies the offset at which the compressed display buffer starts. Settings written to this register do not take
effect until the start of the following frame or interlaced field.
6.6.4.3
DC Memory Offset 018h
Type
Reset Value
This register specifies the offset at which the cursor memory buffer starts. Settings written to this register do not take effect
until the start of the following frame or interlaced field.
322
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:28
31:28
27:0
27:0
Bit
Bit
RSVD
RSVD
DC Cursor Buffer Start Address (DC_CURS_ST_OFFSET)
DC Compression Buffer Start Address (DC_CB_ST_OFFSET)
Name
RSVD
OFFSET
Name
RSVD
OFFSET
R/W
xxxxxxxxh
R/W
xxxxxxxxh
33234H
Description
Reserved.
Compressed Display Buffer Start Offset. This value represents the byte offset of the
starting location of the compressed display buffer. The lower five bits should always be
programmed to zero so that the start offset is aligned to a 32-byte boundary. This value
should change only when a new display mode is set due to a change in size of the frame
buffer.
Description
Reserved.
Cursor Start Offset. This value represents the byte offset of the starting location of the
cursor display pattern. The lower five bits should always be programmed to zero so that
the start offset is 32-byte aligned. Note that if there is a Y offset for the cursor pattern, the
cursor start offset should be set to point to the first displayed line of the cursor pattern.
DC_CURS_ST_OFFSET Bit Descriptions
DC_CB_ST_OFFSET Bit Descriptions
DC_CURS_ST_OFFSET Register Map
DC_CB_ST_OFFSET Register Map
OFFSET
OFFSET
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
0h
0h
1
1
0
0