ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 225

no-image

ALXD800EEXJCVD C3

Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJCVD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
GeodeLink™ Memory Controller Register Descriptions
6.2.2.5
MSR Address
Type
Reset Value
6.2.2.6
MSR Address
Type
Reset Value
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:54
53:32
31:22
63:54
53:32
31:22
21:0
21:0
Bit
Bit
Row Addresses Bank0 DIMM1, Bank1 DIMM0 (MC_CF_BANK89)
Row Addresses Bank2 DIMM1, Bank3 DIMM1 (MC_CF_BANKAB)
Name
RSVD
MC_CF_BANK9
RSVD
MC_CF_BANK8
Name
RSVD
MC_CF_BANKB
RSVD
MC_CF_BANKA
RSVD
RSVD
RSVD
RSVD
20000014h
RO
xxxxxxxx_xxxxxxxxh
20000015h
RO
xxxxxxxx_xxxxxxxxh
Description
Reserved. Reads back as 0.
Memory Controller Configuration Bank 9. Open row address (31:10) for Bank1,
DIMM1.
Reserved. Reads back as 0.
Memory Controller Configuration Bank 8. Open row address (31:10) for Bank0,
DIMM1.
Description
Reserved. Reads back as 0.
Memory Controller Configuration Bank B. Open row address (31:10) for Bank3,
DIMM1.
Reserved. Reads back as 0.
Memory Controller Configuration Bank A. Open row address (31:10) for Bank2,
DIMM1.
MC_CF_BANKAB Bit Descriptions
MC_CF_BANK89 Bit Descriptions
MC_CF_BANKAB Register Map
MC_CF_BANK89 Register Map
MC_CF_BANK9
MC_CF_BANK8
MC_CF_BANKB
MC_CF_BANKA
9
9
8
8
33234H
7
7
6
6
5
5
4
4
3
3
2
2
1
1
225
0
0

Related parts for ALXD800EEXJCVD C3