ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 328

• Manufacturer Part Number: ALXD800EEXJCVD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJCVD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.6.5.1
DC Memory Offset 040h
Type
Reset Value
This register contains horizontal active and total timing information.
328
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:28
27:16
15:12
11:0
Bit
RSVD
DC Horizontal and Total Timing (DC_H_ACTIVE_TIMING)
Name
RSVD
H_TOTAL
RSVD
H_ACTIVE
R/W
xxxxxxxxh
33234H
Description
Reserved. These bits should be programmed to zero.
Horizontal Total. This field represents the total number of pixel clocks for a given scan
line minus 1. Note that the value must represent a value greater than the H_ACTIVE field
(bits [11:0]) because it includes border pixels and blanked pixels. For flat panels, this
value will never change. Unlike previous versions of the DC, the horizontal total can be
programmed to any pixel granularity; it is not limited to character (8-pixel) granularity.
Reserved. These bits should be programmed to zero.
Horizontal Active. This field represents the total number of pixel clocks for the displayed
portion of a scan line minus 1. Note that for flat panels, if this value is less than the panel
active horizontal resolution (H_PANEL), the parameters H_BLK_START, H_BLK_END
(DC Memory Offset 044h[11:0, 27:16]), H_SYNC_ST, and H_SYNC_END (DC Memory
Offset 048h[11:0, 27:16]) should be reduced by the value of H_ADJUST (or the value of
H_PANEL - H_ACTIVE / 2) to achieve horizontal centering.
Unlike previous versions of the DC, this field can be programmed to any pixel granularity;
it is not limited to character (8-pixel) granularity.
If graphics scaling is enabled, this value represents the width of the final (scaled) image
to be displayed. The width of the frame buffer image may be different in this case;
DC_FB_ACTIVE (DC Memory Offset 05Ch) is used to program the horizontal and verti-
cal active values in the frame buffer when graphics scaling is enabled.
H_ACTIVE must be set to at least 64 pixels.
H_TOTAL
DC_H_ACTIVE_TIMING Bit Descriptions
DC_H_ACTIVE_TIMING Register Map
RSVD
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book
9
8
7
H_ACTIVE
6
5
4
3
2
1
0