ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 510

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ALXD800EEXJCVD C3

Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ALXD800EEXJCVD C3

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
6.11
The Security Block provides a hardware Advanced Encryp-
tion Standard (AES) encryption/decryption engine and
interface for accessing EEPROM memory for storing
unique IDs and/or security keys. The AES and EEPROM
sections have separate control registers but share a single
set of interrupt registers.
6.11.1
• AES
• EEPROM I/F
510
rqout
daout
dain
rqin
— Electronic Code Book (ECB) or Cipher Block
— CBC 128-bit hardware encryption and decryption
— DMA read and write (two contexts)
— Hidden key, (stored on EEPROM)
— Writable key can be written by the x86 processor
— Can use interrupts, SMIs, or be polled for completion
— Memory mapped register interface
— Provides 2K bit of EEPROM storage
— Programmable lock bits
Chaining (CBC) 128-bit hardware encryption and
decryption
status
Security Block
Security Block Features
Control
Clock
GLIU
Unit
33234H
slave
master
Figure 6-54. Security Block Diagram
Security Block
AES Engine
True Random Number Generator
Control
Clock
SB Specific
Control
Unit
Clock
Registers
• True Random Number Generator (TRNG)
Note: For security purposes, the EEPROM interface
6.11.1.1 Performance Metrics
• System goals:
Unit
DMA
EEPROM ID Interface
— Programmable “Hidden” AES key
— Can use interrupts, SMIs, or be polled for completion
— Memory mapped register interface
— Read via MSR
— 400 MHz GLIU interface
— > 40 MB/Sec. encrypt or decrypt
status
resets to the “debug disabled” state. It takes
approximately 490 us to read the EEPROM and
unlock the debug interface. Therefore, the “CPU
stall” feature must be available even when the
debug interface is disabled. Since the EEPROM
may not respond for up to 10 ms after a write oper-
ation, the time out for accessing the EEPROM is
set to approximately 17 ms. Therefore it takes
approximately 17 ms for a part without an
EEPROM to unlock after the release from reset.
Top
.
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AMD Geode™ LX Processors Data Book
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.
.
I/O
EEPROM
Security Block
SCL
SDA

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