ALXD800EEXJCVD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJCVD C3 Datasheet - Page 189
ALXD800EEXJCVD C3
Manufacturer Part Number
ALXD800EEXJCVD C3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.ALXD800EEXJCVD_C3.pdf
(680 pages)
Specifications of ALXD800EEXJCVD C3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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CPU Core Register Descriptions
5.5.2.98 L2 Cache Data MSR (L2_DATA_MSR)
MSR Address
Type
Reset Value
L2_DATA_MSR is used to access the L2 cache data for diagnostic accesses.
5.5.2.99
MSR Address
Type
Reset Value
L2_TAG_MSR has the L2 cache tag, MRU and valid bits for diagnostic accesses.
AMD Geode™ LX Processors Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:32
31:15
63:0
14:7
Bit
Bit
3:1
6
5
4
0
L2 Cache Tag MSR (L2_TAG_MSR)
Name
L2_DATA
Name
RSVD
L2_TAG
RSVD
L2_MRU_2
L2_MRU_1
L2_MRU_0
RSVD
L2_VALID
00001923h
R/W
00000000_00000000h
00001924h
R/W
00000000_00000000h
L2_TAG
Description
L2 Cache Array Data. (Default = 0)
Description
Reserved. (Default = 0)
L2 Cache Tag. Tag entry of the current way. (Default = 0)
Reserved. (Default = 0)
L2 Cache 2 Most Recently Used. MRU bit for the current index. If equal to 1, ways 3-2
more recent than ways 1-0. (Default = 0)
L2 Cache 1 Most Recently Used. MRU bit for the current index. If equal to 1, way 3
more recent than way 2. (Default = 0)
L2 Cache 0 Most Recently Used. MRU bit for the current index. If equal to 1, way 1
more recent than way 0. (Default = 0)
Reserved. (Default = 0)
L2 Cache Valid. Valid bit for the current way.
0: Invalid. (Default)
1: Valid.
L2_DATA_MSR Bit Descriptions
L2_TAG_MSR Bit Descriptions
L2_DATA_MSR Register Map
L2_TAG_MSR Register Map
L2_DATA (High DWORD)
L2_DATA (Low DWORD)
RSVD
RSVD
9
9
8
8
33234H
7
7
6
6
5
5
4
4
3
3
RSVD
2
2
1
1
189
0
0
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