IP-CPRI Altera, IP-CPRI Datasheet - Page 9

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 1: About This MegaCore Function
CPRI MegaCore Function Features
December 2010 Altera Corporation
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Interface to external or on-chip processor, using the Altera Avalon
Memory-Mapped (Avalon-MM) interconnect specification.
AUX interface allows you to pass data from slave to master ports or custom
mappers to implement daisy-chain topologies.
Accurate CPRI connection Rx delay measurement.
Up to 24 antenna-carrier interfaces.
Synchronous buffer mode or simple FIFO mode for MAP interfaces.
Independent sample rates for each antenna-carrier interface.
Supports 15- and 16-bit data sample widths on uplink and downlink, and 7- and
8-bit data sample widths on uplink with oversampling ratio 2, using the Altera
Avalon Streaming (Avalon-ST) interconnect specification.
IQ data interface supports mapping methods in sections 4.2.7.2.5 and 4.2.7.2.7 of
the CPRI V4.1 Specification, and mapping Options 1 and 2 in sections 4.2.7.2.3 and
4.2.7.2.4 of the CPRI V4.1 Specification.
Supports the WiMAX mapping methods described in Sections 4.2.7.2.2, 4.2.7.2.5,
and 4.2.7.2.7 of the CPRI V4.1 Specification.
Compliant with the CPRI V4.1 Specification to support UTRA-FDD
(UMTS/WCDMA), E-UTRA (3GPP LTE specification), and WiMAX (IEEE 802.16
standard).
Supports the UMTS/LTE mapping methods described in Section 4.2.7.2 of the
CPRI V4.1 Specification.
Supports the WiMAX timing control methodology described in Section 4.2.8.2 of
the CPRI V4.1 Specification.
Supports Ethernet communication to and from the CPRI link.
Hardware reset output signal, provided as Altera-specified control word in CPRI
communication frame, allows software to respond to CPRI communication
partner reset request.
Vendor-specific subchannel (VSS) communication supported by CPRI link
interface.
Separate reset signal for each clock domain.
Diagnostic parallel reverse loopback paths.
CPRI MegaCore Function User Guide
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