IP-CPRI Altera, IP-CPRI Datasheet - Page 80

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

4–56
Figure 4–26. CPRI MII Interface Signals on Transmitting RE or REC Master and on Receiving RE Slave
CPRI MegaCore Function User Guide
cpri_mii_txd[3:0]
cpri_mii_rxd[3:0]
cpri_mii_txclk
cpri_mii_rxclk
cpri_mii_txen
cpri_mii_rxwr
cpri_mii_rxdv
cpri_mii_txrd
cpri_mii_txer
Figure 4–26
MII interface of a transmitting RE or REC master, and the data from the MII interface
is transmitted on the CPRI link to a receiving RE slave. The timing diagram shows the
MII interface signals on the transmitting master and the receiving slave. The data
value captured on the MII interface transmitter module of the RE or REC master when
cpri_mii_txer is asserted, is passed to the CPRI link as a 5-bit Ethernet HALT symbol
(5’b00100). This symbol is decoded by the RE slave MII interface receiver module as
an F (b’41111).
For more information about the MII interface receiver module, refer to
Interface Receiver Signals” on page
D0
D1
shows an example timing diagram in which an input error is noted on the
D2
D3
D4
D5 D6
D7
5–6.
K
D0
MII Interface to an External Ethernet Block
D1 D2
December 2010 Altera Corporation
Chapter 4: Functional Description
D3
F
“CPRI MII
D5
D6 D7