IP-CPRI Altera, IP-CPRI Datasheet - Page 30

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

4–6
CPRI MegaCore Function User Guide
MAP Interface Clock Domains
Clock Diagrams for the CPRI MegaCore Function
Each antenna-carrier interface has the following two clocks:
■
■
Figure 4–2
configured as RE slaves, RE masters, and REC masters in Arria II GX, Arria II GZ,
Cyclone IV GX, and Stratix IV GX devices with CPRI line rate greater than
0.6144 Gbps.
functions configured as RE slaves, RE masters, and REC masters in all four device
families with CPRI line rate 0.6144 Gbps.
mapN_tx_clk—Expected rate of received data on this antenna-carrier interface. The
frequency of this clock is the sample rate on the incoming antenna-carrier
interface.
mapN_rx_clk— Clocks the transmissions of this antenna-carrier interface. The
frequency of this clock is the sample rate on the outgoing antenna-carrier interface.
For more information about data channel sample rates, refer to
Table 4–5 on page
to
Figure 4–6
Figure 4–5
4–26.
and
show the clocking schemes for CPRI MegaCore functions
Figure 4–7
show the clock diagrams for CPRI MegaCore
December 2010 Altera Corporation
Chapter 4: Functional Description
Clocking and Reset Structure
Table 4–4
and