XC3S400AN-4FTG256I Xilinx Inc, XC3S400AN-4FTG256I Datasheet - Page 80

• Manufacturer Part Number: XC3S400AN-4FTG256I
• Description: IC FPGA SPARTAN-3AN 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S400AN-4FTG256I

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 368640
• Number Of I /o: 195
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 8: Sector-Based Program/Erase Protection
Table 8-10: Sector Lockdown Commands
80
Sector Lockdown Register Read
Sector Lockdown Program
Sector Lockdown Program
Command
There are two commands associated with the Sector Lockdown feature, as shown in
Table
To lock down a specific sector, issue a Sector Lockdown Program command, followed by a
24-bit sector address, anywhere within the memory sector to be locked down.
To issue the Sector Lockdown Program command, the FPGA application must perform the
following actions using the SPI_ACCESS design primitive.
•
•
Table 8-11: Sector Lockdown Program Command Sequence
•
•
A Low-to-High transition on the CSB input completes the command sequence and the ISF
memory then programs the
self-timed and completes in the Page Programming time, T
MOSI
Pin
Drive CSB Low while CLK is High or on the rising edge of CLK.
On the falling edge of CLK, serially clock in the four-byte Sector Lockdown Program
command sequence shown in
byte first.
Immediately following the four-byte command code, serially clock in a 24-bit Sector
address.
♦
♦
♦
♦
After clocking in the last bit of the 24-bit address, drive the CSB pin High on the
falling edge of CLK.
8-10.
Sector 0 is different than all other sectors.
-
-
The page address and byte address bits, which follow the Sector Address, specify
any valid address location within the sector which is to be erased.
If using the default address scheme, see
If using power-of-2 addressing, see
Byte 1
0x3D
Sector 0 is subdivided into two subsectors called Sector 0a and Sector 0b.
Sector 0a and Sector 0b are each erased individually and require a unique
address with additional addressing bits, different than all the other sectors.
Read the contents of the Sector Lockdown
Register to determine the current ISF memory
settings.
Lock down a specific Sector.
Four-byte Command Sequence
Byte 2
0x2A
www.xilinx.com
Sector Lockdown
Function
Byte 3
Table 8-11
0x7F
Spartan-3AN FPGA In-System Flash User Guide
Table A-6, page
on the MOSI pin, most-significant bit of each
Byte 4
Register. The erase operation is internally
0x30
Table 5-10, page 59
Default Addressing:
See
page
Power-of-2
Addressing: See
Table A-6, page 90
Byte 5
0x3D + 0x2A + 0x7F + 0x30
PP
Table 5-10,
90.
59.
, or between 4 to 6 ms as
UG333 (v2.1) January 15, 2009
Command Sequence
24-bit Address
.
Hexadecimal
Byte 6
0x35
.
Byte 7
XX
R