XC3S400AN-4FTG256I Xilinx Inc, XC3S400AN-4FTG256I Datasheet - Page 29

• Manufacturer Part Number: XC3S400AN-4FTG256I
• Description: IC FPGA SPARTAN-3AN 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S400AN-4FTG256I

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 368640
• Number Of I /o: 195
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Read Commands
Table 3-1: Summary of In-System Flash Memory Read Commands
Spartan-3AN FPGA In-System Flash User Guide
UG333 (v2.1) January 15, 2009
Notes:
1. The Buffer 2 commands are not available in the XC3S50AN because it has only one SRAM page buffer.
Command
Fast
Read
Random
Read
Page to
Buffer
Transfer
Buffer
Read
Buffer
Read
(Low
Freq)
Read
Reading a large block of
contiguous data, if CLK
frequency is above 33 MHz
Reading bytes from
randomly-addressed
locations, all read operations
at 33 MHz or less
Transfers the entire contents
of a selected ISF memory page
to the specified SRAM page
buffer
Reading multiple contiguous
bytes from the SRAM page
buffer
Randomly reading bytes from
the SRAM page buffer
R
Best Application
The Spartan
directly from the main Flash memory or from either one of the SRAM data buffers by
issuing the appropriate command code.
supported read commands. Some read commands offer multiple forms. One form is best
for reading large blocks of contiguous data while the other form is better for reading single
bytes from randomly-address locations. Typically, the commands with faster data transfer
also have a longer initial latency and require one or more “don’t care” bytes after sending
the appropriate read command and 24-bit address.
®
-3AN FPGA application reads In-System Flash (ISF) memory data either
Command
Buffer 1
Buffer 2
Buffer 1
Buffer 2
Buffer 1
Buffer 2
(0x53)
(0x55)
(0xD4)
(0xD6)
(0xD1)
(0xD3)
0x0B
0x03
Code
Hex
www.xilinx.com
Frequency
Max CLK
50
33
33
50
33
Latency
cycles
cycles
None
None
None
Initial
Extra
Table 3-1
8
8
SRAM
SRAM
SRAM
buffer
buffer
buffer
Flash
array
Flash
array
page
page
page
Read
From
summarizes and compares the various
Minimum
1 byte
1 byte
1 byte
1 byte
page
Read
One
Size
Maximum
Entire
Entire
array
array
page
page
page
Read
One
One
One
Size
Chapter 3
Buffers
Affects
SRAM
Page
Yes
No
No
No
No
Simulation
Support
Yes
Yes
Yes
No
No
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