XC3S400AN-4FTG256I Xilinx Inc, XC3S400AN-4FTG256I Datasheet - Page 16

• Manufacturer Part Number: XC3S400AN-4FTG256I
• Description: IC FPGA SPARTAN-3AN 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S400AN-4FTG256I

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 368640
• Number Of I /o: 195
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2: In-System Flash Memory Architecture
16
Table 2-1: Spartan-3AN FPGA Memory Architecture
The most basic construct within the hierarchy is a memory Page. By default, a Page consists
of 264 bytes, except on the XC3S1400AN FPGA, which has a larger page size of 528 bytes.
The page size is reduced when the
shown in gray in
enough to hold an entire page image. A page is the smallest erasable element within the
ISF memory, while a byte is the smallest readable and writable element within an SRAM
page buffer.
Pages are also grouped into a larger structure called a Block, which consists of 8 pages. The
Block Erase
Erase
blocks are further combined into Sectors. A sector typically consists of 256 contiguous
pages or 32 contiguous blocks, except on the XC3S50AN, which has 128 pages per sector.
Sectors have additional control options. Sectors can be selectively write-protected by the
FPGA application, a featured called
permanently locked down, preventing the contents from ever being erased or modified,
using a feature called
pages, and blocks within the sector.
The ISF memory hierarchy directly impacts the ISF commands and addressing, as
described in subsequent sections.
XC3S1400AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S50AN
Device
command and the slower-but-larger
Sector 15
Sector 3
Sector 2
Sector 1
Sector 0
Sectors
Figure 2-2: XC3S700AN Internal SPI Flash Memory Hierarchy
command provides an intermediate solution between the fast-but-small
Figure
Total Flash
17,301,504
1,081,344
4,325,376
4,325,376
8,650,752
Sector
Bits
2-2. The SRAM page buffer(s), shown in
www.xilinx.com
Sector = 256 Pages
Lockdown. The sector controls similarly affect any data bytes,
Sectors Sector Size
= 32 Blocks
16
16
Optional Power-of-2 Addressing Mode
4
8
8
Sector
(256 bytes)
264 bytes
Sector Erase
Protection. Similarly, sectors can be
Spartan-3AN FPGA In-System Flash User Guide
Page
132K
33K
66K
66K
66K
Pages per
Sector
command.Finally, pages and
128
256
UG333 (v2.1) January 15, 2009
(Block = 2,048 bytes)
Block = 2,112 bytes
Figure
Block = 8 Pages
Pages
Total
2,048
2,048
4,096
4,096
512
Page 7
Page 6
Page 5
Page 4
Page 3
Page 2
Page 1
Page 0
2-1, are large
is selected, as
UG333_c2_01_092106
Page Size
(Bytes)
264
264
264
264
528
Page
R