XC3S400AN-4FTG256I Xilinx Inc, XC3S400AN-4FTG256I Datasheet - Page 58

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XC3S400AN-4FTG256I

Manufacturer Part Number
XC3S400AN-4FTG256I
Description
IC FPGA SPARTAN-3AN 256FTBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr

Specifications of XC3S400AN-4FTG256I

Number Of Logic Elements/cells
8064
Number Of Labs/clbs
896
Total Ram Bits
368640
Number Of I /o
195
Number Of Gates
400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-LBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 5: Erase Commands
58
Sector Addressing
Default Addressing Mode
The addressing to access a sector depends on the address mode.
Furthermore,
Spartan-3AN FPGA and also indicate where the FPGA configuration bitstream is stored.
Also see
Table 5-10
into two subsectors, designated as Sector 0a and Sector 0b. These subsectors require
additional address bits.
Drive CSB High on the falling edge of CLK to end the command.
“Default Addressing Mode,” page 58
“Optional Power-of-2 Addressing Mode,” page 87
The page address and byte address bits, which follow the Sector Address, specify
any valid address location within the sector which is to be erased.
If using the default address scheme, see
If using power-of-2 addressing, see
When erasing a sector, be aware of how the FPGA bitstream is stored within the
ISF memory. There is always one bitstream stored starting at Sector 0, as indicated
in blue in
second FPGA bitstream is stored starting on the next sector boundary, following
the first bitstream. The optional MultiBoot bitstream is shown in yellow in
Table 5-11
“Memory Allocation Tables,” page
shows the sector addressing for default addressing mode. Sector 0 is subdivided
Table 5-11
Table 5-11
and
Table 5-12, page
and
www.xilinx.com
and
Table 5-12, page 60
Table 5-12, page
60.
Spartan-3AN FPGA In-System Flash User Guide
Table A-6, page 90
20.
summarize the sector addresses for each
Table 5-10
60. If using MultiBoot configuration, a
.
.
UG333 (v2.1) January 15, 2009
R

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