MCHC908MR8CFAE Freescale Semiconductor, MCHC908MR8CFAE Datasheet - Page 9

• Manufacturer Part Number: MCHC908MR8CFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 16
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
6.4.4
6.4.5
6.5
6.6
6.6.1
6.6.2
6.7
6.8
7.1
7.2
7.3
7.3.1
7.3.2
7.3.3
7.4
7.4.1
7.4.2
7.4.2.1
7.4.2.2
7.4.2.3
7.4.2.4
7.4.2.5
7.5
7.5.1
7.5.2
7.6
7.6.1
7.6.1.1
7.6.1.2
7.6.2
7.6.3
7.7
7.7.1
Arithmetic/Logic Unit (ALU) . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SIM Bus Clock Control and Generation . . . . . . . . . . . . . . . . . . 93
Reset and System Initialization. . . . . . . . . . . . . . . . . . . . . . . . . 94
Exception Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99
Low-Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
SIM Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Section 7. System Integration Module (SIM)
Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Condition Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Clock Startup from POR or LVI Reset . . . . . . . . . . . . . . . . . 93
Clocks in Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
External Pin Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Active Resets from Internal Sources . . . . . . . . . . . . . . . . . . 95
SIM Counter During Power-On Reset . . . . . . . . . . . . . . . . . 99
SIM Counter and Reset States. . . . . . . . . . . . . . . . . . . . . . . 99
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Status Flag Protection in Break Mode . . . . . . . . . . . . . . . . 103
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .104
Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Computer Operating Properly (COP) Reset. . . . . . . . . . . 97
Illegal Opcode Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . .98
Low-Voltage Inhibit (LVI) Reset . . . . . . . . . . . . . . . . . . . . 98
Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
SWI Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Table of Contents
Table of Contents
Technical Data
9