MCHC908MR8CFAE Freescale Semiconductor, MCHC908MR8CFAE Datasheet - Page 279

IC MCU 8K FLASH 8MHZ PWM 32-LQFP

MCHC908MR8CFAE

Manufacturer Part Number
MCHC908MR8CFAE
Description
IC MCU 8K FLASH 8MHZ PWM 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908MR8CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908MR8CFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Technical Data — MC68HC908MR8
14.1 Contents
14.2 Introduction
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
NOTE:
14.2
14.3
14.3.1
14.3.2
14.4
14.4.1
14.4.2
14.5
14.5.1
14.5.2
Fourteen bidirectional input-output (I/O) pins, two input pins, and six
output pins form three parallel ports.
When using the 28-pin package versions of the MC68HC908MR8, set
the data direction register bits in DDRA such that bits 6, 5, and 4 are
written to a logic 1 (along with any other output bits on PORTA). Setting
PORTA’s data direction register bits 6, 5, and 4 will terminate the input
buffers on that port.
Connect any unused I/O pins to an appropriate logic level, either V
V
do not require termination for proper operation, termination reduces
excess current consumption and the possibility of electrostatic damage.
SS
. (PWM6–PWM1 pins require no termination). Although the I/O ports
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .279
Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .281
Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .284
Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .286
Port A Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .281
Data Direction Register A . . . . . . . . . . . . . . . . . . . . . . . .282
Port B Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .284
Data Direction Register B . . . . . . . . . . . . . . . . . . . . . . . .285
Port C Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .287
Data Direction Register C . . . . . . . . . . . . . . . . . . . . . . . .288
Section 14. Input/Output (I/O) Ports
Input/Output (I/O) Ports
Technical Data
DD
279
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