MCHC908MR8CFAE Freescale Semiconductor, MCHC908MR8CFAE Datasheet - Page 293

IC MCU 8K FLASH 8MHZ PWM 32-LQFP

MCHC908MR8CFAE

Manufacturer Part Number
MCHC908MR8CFAE
Description
IC MCU 8K FLASH 8MHZ PWM 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908MR8CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908MR8CFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
15.4 I/O Signals
15.4.1 CGMXCLK
15.4.2 COPCTL Write
15.4.3 Power-On Reset
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
NOTE:
The COP counter is a free-running, 6-bit counter preceded by the 13-bit
system integration module (SIM) counter. If not cleared by software, the
COP counter overflows and generates an asynchronous reset after
2
period is 53.3 ms. Writing any value to location $FFFF before overflow
occurs clears the COP counter and prevents reset.
A COP reset pulls the RST pin low for 32 CGMXCLK cycles and sets the
COP bit in the SIM reset status register (SRSR) (see
Status
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
This subsection describes the signals shown in
CGMXCLK is the crystal oscillator output signal. CGMXCLK frequency
is equal to the crystal frequency.
Writing any value to the COP control register (COPCTL) (see
Control
SIM counter. Reading the COP control register returns the reset vector.
The power-on reset (POR) circuit in the SIM clears the SIM counter 4096
CGMXCLK cycles after power-up.
18
–2
4
CGMXCLK cycles. With a 4.9152-MHz crystal, the COP timeout
Register).
Computer Operating Properly (COP)
Register) clears the COP counter and clears bits 12–4 of the
Computer Operating Properly (COP)
Figure
7.7.4 SIM Reset
15-1.
Technical Data
15.5 COP
I/O Signals
293

Related parts for MCHC908MR8CFAE