MCHC908MR8CFAE Freescale Semiconductor, MCHC908MR8CFAE Datasheet - Page 319

• Manufacturer Part Number: MCHC908MR8CFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 16
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.9 I/O Registers
18.9.1 ADC Status and Control Register
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
These I/O registers control and monitor operation of the ADC:
These paragraphs describe the function of the ADC status and control
register (ADSCR). Writing ADSCR aborts the current conversion and
initiates a new conversion.
COCO — Conversions Complete Bit
Reset:
dress:
Read:
Write:
Ad-
•
•
•
•
When AIEN bit is a logic 0, the COCO is a read-only bit which is set
each time a conversion is completed except in the continuous
conversion mode where it is set after the first conversion. This bit is
cleared whenever the ADC status and control register is written or
whenever the ADC data register is read.
If AIEN bit is a logic 1, the COCO is a read/write bit which selects the
CPU to service the ADC interrupt request. Reset clears this bit.
Figure 18-3. ADC Status and Control Register (ADSCR)
1 = Conversion completed (AIEN = 0) interrupt (AIEN = 1)
0 = Conversion not completed (AIEN = 0)/CPU interrupt (AIEN = 1)
ADC status and control register (ADSCR)
ADC data registers (ADRH and ARDL)
ADC control register (ADCR)
ADC clock register (ADCLK)
COCO
$0040
Bit 7
Analog-to-Digital Converter (ADC)
0
AIEN
6
0
ADCO
5
0
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
4
1
3
1
Analog-to-Digital Converter (ADC)
2
1
1
1
Technical Data
I/O Registers
Bit 0
1
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