MCHC908MR8CFAE Freescale Semiconductor, MCHC908MR8CFAE Datasheet - Page 322

IC MCU 8K FLASH 8MHZ PWM 32-LQFP

MCHC908MR8CFAE

Manufacturer Part Number
MCHC908MR8CFAE
Description
IC MCU 8K FLASH 8MHZ PWM 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908MR8CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCHC908MR8CFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Analog-to-Digital Converter (ADC)
18.9.2 ADC Data Register High
Technical Data
322
In left justified mode, this 8-bit result register holds the eight MSBs of the
10-bit result. This register is updated each time an ADC single channel
conversion completes. Reading ADRH latches the contents of ADRL
until ADRL is read. Until ADRL is read, all subsequent ADC results will
be lost.
Reset:
In right justified mode, this 8-bit result register holds the two MSBs of the
10-bit result. All other bits read as 0. This register is updated each time
a single channel ADC conversion completes. Reading ADRH latches the
contents of ADRL until ADRL is read. Until ADRL is read, all subsequent
ADC results will be lost.
Reset:
dress:
dress:
Read:
Read:
Write:
Write:
Ad-
Ad-
$0041
$0041
Bit 7
Bit 7
AD9
R
R
R
R
Analog-to-Digital Converter (ADC)
0
Figure 18-4. ADC Data Register High (ADRH)
Figure 18-5. ADC Data Register High (ADRH)
= Reserved
= Reserved
AD8
R
R
6
6
0
Right Justified Mode
Left Justified Mode
AD7
R
R
5
5
0
Unaffected by Reset
Unaffected by Reset
AD6
R
R
4
4
0
AD5
R
R
3
3
0
MC68HC908MR8 — Rev 4.1
AD4
Freescale Semiconductor
R
R
2
2
0
AD3
AD9
R
R
1
1
Bit 0
Bit 0
AD2
AD8
R
R

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