ST7FOXK1T6 STMicroelectronics, ST7FOXK1T6 Datasheet - Page 49

IC MCU 8BIT 1V FLASH MEM 32LQFP

ST7FOXK1T6

Manufacturer Part Number
ST7FOXK1T6
Description
IC MCU 8BIT 1V FLASH MEM 32LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FOXK1T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FOXx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 1 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-6336

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
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Manufacturer:
ST
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Manufacturer:
STMicroelectronics
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ST7FOXF1, ST7FOXK1, ST7FOXK2
6.5.5
Caution:
6.5.6
Prescaler register (PSCR)
Reset value: 0000 0000 (00h) for ST7FOXF1 and ST7FOXK1
Reset value: 0000 0011 (03h) for ST7FOXK2
Bits 7:5 = CK[2:0] internal RC Prescaler Selection
Table 11.
Bits 4:2 = Reserved, must be cleared.
Bits 1:0 = Must be set.
For ST7FOXF1 and ST7FOXK1 devices, PRSC[1:0] bits must be forced to 1 by software in
order to reduce current consumption.
Clock controller control/status register (CKCNTCSR)
Reset value: 0000 1001 (09h)
Bits 7:4 = Reserved, must be kept cleared.
Bit 3 = AWU_FLAG AWU Selection bit
CK2
CK2
0
7
These bits are set by software and cleared by hardware after a reset. These bits select
the prescaler of the internal RC oscillator. See
If the internal RC is used with a supply operating range below 3.3 V, a division ratio of
at least 2 must be enabled in the RC prescaler.
0
0
0
1
7
This bit is set and cleared by hardware.
0: No switch from AWU to RC requested
1: AWU clock activated and temporization completed
Internal RC prescaler selection bits
others
CK1
CK1
0
0
1
1
0
CK0
CK0
0
1
0
1
0
0
0
AWU_FLAG
Read/write
Read/write
0
Supply, reset and clock management
Table
RC_FLAG
11.
f
f
f
f
f
RC/16
RC/2
RC/4
RC/8
OSC
f
0
RC
0 or 1
0
RC/AWU
0 or 1
0
0
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