ST7FOXK1T6 STMicroelectronics, ST7FOXK1T6 Datasheet - Page 103

• Manufacturer Part Number: ST7FOXK1T6
• Description: IC MCU 8BIT 1V FLASH MEM 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FOXK1T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FOXx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 1 Channel
• For Use With: 497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-6336

ST7FOXF1, ST7FOXK1, ST7FOXK2
Note:
Break control register 2 (BREAKCR2)
Reset value: 0000 0000 (00h)
This register is available on ST7FOXK2 only
Bit 7 = BR2SEL Break 2 input selection bit
Bit 6 = BR2EDGE Break 2 input edge selection bit
Bit 5 = BA2 Break 2 Active bit
Bit 4 = BP2EN Break 2 pin enable bit
Bits 3:2 = Reserved, must be kept cleared
Bit 1 = SWBR2 Switch Break for counter 2 bit
Bit 0 = SWBR1 Switch Break for counter 1 bit
BR2SEL
This bit is read/write by software and cleared by hardware after reset. It selects the
active Break 2 signal from external BREAK2 pin and the output of the comparator.
0: External BREAK2 pin is selected for break mode.
1: Comparator 2 output is selected for break mode.
This bit is read/write by software and cleared by hardware after reset. It selects the
active level of Break 2 signal.
0: Low level of Break 2 selected as active level
1: High level of Break 2 selected as active level
This bit is read/write by software, cleared by hardware after reset and set by hardware
when the active level defined by the BR2EDGE bit is applied on the BREAK2 pin. It
activates/deactivates the Break 2 function.
0: Break 2 not active
1: Break 2 active
This bit is read/write by software and cleared by hardware after Reset.
0: BREAK2 pin disabled
1: BREAK2 pin enabled
This bit is read/write by software. While BREN2 is set, it selects BA1 or BA2 to control
PWM2/3 if ENCNTR2 bit is set.
0: BA1 selected
1: BA2 selected
This bit is read/write by software. While BREN1 is set, it selects BA1 or BA2 to control
PWM0/1 by default and also PWM2/3 if ENCNTR2 bit is reset.
0: BA1 selected
1: BA2 selected
7
BR2EDGE
BA2
BP2EN
Read/write
-
-
On-chip peripherals
SWBR2
SWBR1
103/226
0