PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 67

• Manufacturer Part Number: PIC18F4431-E/P
• Description: IC MCU FLASH 8KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Details

6.5
The data memory in PIC18 devices is implemented as
static RAM. Each register in the data memory has a 12-bit
address, allowing up to 4,096 bytes of data memory. The
memory space is divided into as many as 16 banks that
contain 256 bytes each. PIC18F2331/2431/4331/4431
devices implement all 16 banks.
Figure 6-6
PIC18F2331/2431/4331/4431 devices. The data mem-
ory contains Special Function Registers (SFRs) and
General Purpose Registers (GPRs). The SFRs are used
for control and status of the controller and peripheral
functions, while GPRs are used for data storage and
scratchpad operations in the user’s application. Any
read of an unimplemented location will read as ‘0’s.
FIGURE 6-6:
 2010 Microchip Technology Inc.
BSR<3:0>
= 0000
= 0001
= 0010
= 0011
= 1110
= 1111
Data Memory Organization
shows the data memory organization for the
DATA MEMORY MAP FOR PIC18F2331/2431/4331/4431 DEVICES
Bank 14
Bank 15
Bank 3
Bank 0
Bank 1
Bank 2
to
FFh
FFh
FFh
FFh
00h
00h
00h
00h
00h
Data Memory Map
Access RAM
Read ‘00h’
Unused
Unused
GPR
GPR
GPR
SFR
PIC18F2331/2431/4331/4431
000h
05Fh
060h
0FFh
100h
1FFh
200h
2FFh
300h
EFFh
F00h
F5Fh
F60h
FFFh
The instruction set and architecture allow operations
across all banks. The entire data memory may be
accessed by Direct, Indirect or Indexed Addressing
modes. Addressing modes are discussed later in this
subsection.
To ensure that commonly used registers (SFRs and
select GPRs) can be accessed in a single cycle, PIC18
devices implement an Access Bank. This is a 256-byte
memory space that provides fast access to SFRs and
the lower portion of GPR Bank 0 without using the
BSR.
detailed description of the Access RAM.
Section 6.5.2 “Access Bank”
When a = 0:
When a = 1:
The BSR is ignored and the
Access Bank is used.
The first 96 bytes are
General Purpose RAM
(from Bank 0).
The second 160 bytes are
Special Function Registers
(from Bank 15).
The BSR specifies the bank
used by the instruction.
Access RAM High
Access RAM Low
Access Bank
(SFRs)
DS39616D-page 67
provides a
00h
5Fh
60h
FFh