PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 270

• Manufacturer Part Number: PIC18F4431-E/P
• Description: IC MCU FLASH 8KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Details

PIC18F2331/2431/4331/4431
REGISTER 23-7:
REGISTER 23-8:
DS39616D-page 270
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-0
Note 1:
CPD
R/C-1
U-0
—
2:
(1)
Unimplemented in PIC18F2331/4331 devices; maintain this bit set.
Refer to
Refer to
Unimplemented: Read as ‘0’
CP3: Code Protection bit
1 = Block 3 is not code-protected
0 = Block 3 is code-protected
CP2: Code Protection bit
1 = Block 2 is not code-protected
0 = Block 2 is code-protected
CP1: Code Protection bit
1 = Block 1 is not code-protected
0 = Block 1 is code-protected
CP0: Code Protection bit
1 = Block 0 is not code-protected
0 = Block 0 is code-protected
CPD: Data EEPROM Code Protection bit
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected
CPB: Boot Block Code Protection bit
1 = Boot Block is not code-protected
0 = Boot Block is code-protected
Unimplemented: Read as ‘0’
CPB
R/C-1
U-0
Figure 23-5
Figure 23-5
—
CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
(1)
C = Clearable bit
C = Clearable bit
for block boundary addresses.
for block boundary addresses.
U-0
U-0
—
—
(1,2)
(1,2)
(2)
(2)
U-0
U-0
—
—
(1)
(1)
U = Unimplemented bit, read as ‘0’
U = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
U = Unchanged from programmed state
CP3
R/C-1
U-0
—
(1,2)
CP2
R/C-1
U-0
—
(1,2)
 2010 Microchip Technology Inc.
CP1
R/C-1
U-0
—
(2)
CP0
R/C-1
U-0
—
(2)
bit 0
bit 0