PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 268

IC MCU FLASH 8KX16 40DIP

PIC18F4431-E/P

Manufacturer Part Number
PIC18F4431-E/P
Description
IC MCU FLASH 8KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/P

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
9 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
 Details

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PIC18F2331/2431/4331/4431
REGISTER 23-5:
DS39616D-page 268
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
MCLRE
R/P-1
(1)
Unimplemented in PIC18F2331/2431 devices; maintain this bit set.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin is enabled; RE3 input pin is disabled
0 = RE3 input pin is enabled; MCLR is disabled
Unimplemented: Read as ‘0’
EXCLKMX: TMR0/T5CKI External Clock MUX bit
1 = TMR0/T5CKI external clock input is multiplexed with RC3
0 = TMR0/T5CKI external clock input is multiplexed with RD0
PWM4MX: PWM4 MUX bit
1 = PWM4 output is multiplexed with RB5
0 = PWM4 output is multiplexed with RD5
SSPMX: SSP I/O MUX bit
1 = SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output
0 = SCK/SCL clocks and SDA/SDI data are multiplexed with RD3 and RD2, respectively. SDO output
Unimplemented: Read as ‘0’
FLTAMX: FLTA MUX bit
1 = FLTA input is multiplexed with RC1
0 = FLTA input is multiplexed with RD4
is multiplexed with RC7.
is multiplexed with RD1.
U
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
P = Programmable bit
U
(1)
(1)
(1)
EXCLKMX
(1)
R/P-1
(1)
U = Unimplemented bit, read as ‘0’
U = Unchanged from programmed state
PWM4MX
R/P-1
(1)
(1)
SSPMX
R/P-1
(1)
 2010 Microchip Technology Inc.
U
FLTAMX
R/P-1
bit 0
(1)

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