PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 290

IC MCU FLASH 8KX16 40DIP

PIC18F4431-E/P

Manufacturer Part Number
PIC18F4431-E/P
Description
IC MCU FLASH 8KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/P

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
9 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
 Details

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Quantity:
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PIC18F2331/2431/4331/4431
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39616D-page 290
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Carry bit =
REG
W
Carry bit =
REG
W
Q1
=
=
=
=
register ‘f’
ADD W and Carry bit to f
[ label ] ADDWFC
0  f  255
d [0,1]
a [0,1]
(W) + (f) + (C)  dest
N, OV, C, DC, Z
Add W, the Carry flag and data memory
location, ‘f’. If ‘d’ is ‘0’, the result is placed
in W. If ‘d’ is ‘1’, the result is placed in
data memory location, ‘f’. If ‘a’ is ‘0’, the
Access Bank will be selected. If ‘a’ is ‘1’,
the BSR will not be overridden.
1
1
ADDWFC
Read
Q2
0010
1
0x02
0x4D
0
0x02
0x50
00da
REG, W
Process
Data
Q3
f [,d [,a]]
ffff
destination
Write to
Q4
ffff
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
Read literal
=
=
AND Literal with W
[ label ] ANDLW
0  k  255
(W) .AND. k  W
N, Z
The contents of W are ANDed with the
8-bit literal ‘k’. The result is placed in W.
1
1
ANDLW
0000
Q2
‘k’
0xA3
0x03
 2010 Microchip Technology Inc.
1011
0x5F
Process
Data
Q3
k
kkkk
Write to
Q4
W
kkkk

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