PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 276

• Manufacturer Part Number: PIC18F4431-E/P
• Description: IC MCU FLASH 8KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Details

PIC18F2331/2431/4331/4431
23.3
The Two-Speed Start-up feature helps to minimize the
latency period from oscillator start-up to code execution
by allowing the microcontroller to use the INTRC oscil-
lator as a clock source until the primary clock source is
available. It is enabled by setting the IESO bit in
Configuration Register 1H (CONFIG1H<7>).
Two-Speed Start-up is available only if the primary
oscillator mode is LP, XT, HS or HSPLL (Crystal-Based
modes). Other sources do not require a OST start-up
delay; for these, Two-Speed Start-up is disabled.
When enabled, Resets and wake-ups from Sleep mode
cause the device to configure itself to run from the
internal oscillator block as the clock source, following
the time-out of the Power-up Timer after a Power-on
Reset is enabled. This allows almost immediate code
execution while the primary oscillator starts and the
OST is running. Once the OST times out, the device
automatically switches to PRI_RUN mode.
Because the OSCCON register is cleared on Reset
events, the INTOSC (or postscaler) clock source is not
initially available after a Reset event; the INTRC clock
is used directly at its base frequency. To use a higher
clock speed on wake-up, the INTOSC or postscaler
clock sources can be selected to provide a higher clock
speed by setting bits IRCF<2:0> immediately after
Reset. For wake-ups from Sleep, the INTOSC or post-
scaler clock sources can be selected by setting
IRCF<2:0> prior to entering Sleep mode.
FIGURE 23-2:
DS39616D-page 276
Note 1:
CPU Clock
Multiplexer
PLL Clock
Peripheral
Program
INTOSC
Two-Speed Start-up
Counter
Output
OSC1
Clock
Wake from Interrupt Event
T
OST
= 1024 T
PC
TIMING TRANSITION FOR TWO-SPEED START-UP (INTOSC TO HSPLL)
OSC
Q1
; T
T
PLL
OST
= 2 ms (approx). These intervals are not shown to scale.
(1)
Q2
PC + 2
OSTS bit Set
T
PLL
Q3
(1)
Q4
Q1
1
2
In all other power-managed modes, Two-Speed Start-
up is not used. The device will be clocked by the
currently selected clock source until the primary clock
source becomes available. The setting of the IESO
Configuration bit is ignored.
23.3.1
While using the INTRC oscillator in Two-Speed Start-
up, the device still obeys the normal command
sequences for entering power-managed modes,
including
Section 4.1.4 “Multiple Sleep
practice, this means that user code can change the
SCS<1:0> bit settings and issue SLEEP commands
before the OST times out. This would allow an applica-
tion to briefly wake-up, perform routine “housekeeping”
tasks and return to Sleep before the device starts to
operate from the primary oscillator.
User code can also check if the primary clock source is
currently providing the system clocking by checking the
status of the OSTS bit (OSCCON<3>). If the bit is set,
the primary oscillator is providing the system clock.
Otherwise, the internal oscillator block is providing the
clock during wake-up from Reset or Sleep mode.
Clock Transition
3
4
5
PC + 4
SPECIAL CONSIDERATIONS FOR
USING TWO-SPEED START-UP
serial
6
7
SLEEP
8
Q2
 2010 Microchip Technology Inc.
Q3 Q4
instructions
Q1
Commands”). In
Q2
PC + 6
Q3 Q4
(refer
to