AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 70

IC MCU 16/32BIT ARM9 324TFBGA

AT91SAM9M10-CU

Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9M10-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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11.5.3.3
11.5.3.4
70
AT91SAM9M10
Enumeration Process
Communication Endpoints
The USB protocol is a master/slave protocol. The host starts the enumeration, sending requests
to the device through the control endpoint. The device handles standard requests as defined in
the USB Specification.
Table 11-5.
The device also handles some class requests defined in the CDC class.
Table 11-6.
Unhandled requests are STALLed.
There are two communication endpoints and endpoint 0 is used for the enumeration process.
Endpoint 1 is a 64-byte Bulk OUT endpoint and endpoint 2 is a 64-byte Bulk IN endpoint. SAM-
BA Boot commands are sent by the host through endpoint 1. If required, the message is split by
the host into several data payloads by the host driver.
If the command requires a response, the host can send IN transactions to pick up the response.
Request
GET_DESCRIPTOR
SET_ADDRESS
SET_CONFIGURATION
GET_CONFIGURATION
GET_STATUS
SET_FEATURE
CLEAR_FEATURE
Request
SET_LINE_CODING
GET_LINE_CODING
SET_CONTROL_LINE_STATE
Handled Standard Requests
Handled Class Requests
Definition
Returns the current device configuration value.
Sets the device address for all future device access.
Sets the device configuration.
Returns the current device configuration value.
Returns status for the specified recipient.
Used to set or enable a specific feature.
Used to clear or disable a specific feature.
Definition
Configures DTE rate, stop bits, parity and number of
character bits.
Requests current DTE rate, stop bits, parity and number
of character bits.
RS-232 signal used to tell the DCE device the DTE
device is now present.
6355B–ATARM–21-Jun-10

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