AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 61
AT91SAM9M10-CU
Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9M10-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
- Current page: 61 of 1404
- Download datasheet (22Mb)
11.4.2
11.4.2.1
6355B–ATARM–21-Jun-10
Valid Code Detection
ARM Exception Vectors Check
Figure 11-3. Remap Action after Download Completion
The NVM bootloader program initializes the NVM. It initializes the required PIO. It sets the right
peripheral depending on the NVM and tries to access the memory. If the initialization fails, it
restores the reset values for the PIO and peripherals and then the next NVM bootloader program
is executed.
If the initialization is successful, the NVM bootloader program reads the beginning of the NVM
and determines if the NVM contains valid code.
If the NVM does not contain valid code, the NVM bootloader program restores the reset value for
the peripherals and then the next NVM bootloader program is executed.
If valid code is found, this code is loaded from NVM into internal SRAM and executed by branch-
ing at address 0x0000_0000 after remap. This code may be the application code or a second-
level bootloader. All the calls to functions are PC relative and do not use absolute addresses.
There are two kinds of valid code detection. Depending on the NVM bootloader, either one or
both of them is used.
The NVM bootloader program reads and analyzes the first 28 bytes corresponding to the first
seven ARM exception vectors. Except for the sixth vector, these bytes must implement the ARM
instructions for either branch or load PC with PC relative addressing.
Figure 11-4. LDR Opcode
31
1
1
1
28 27
0
0x0000_0000
0x0030_0000
0x0040_0000
0
1
I
24 23
P
U
Internal
Internal
Internal
ROM
SRAM
ROM
1
W 0
20 19
Rn
REMAP
16 15
Rd
Internal
Internal
Internal
SRAM
SRAM
ROM
12 11
AT91SAM9M10
0x0000_0000
0x0030_0000
0x0040_0000
O set
0
61
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