AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 1100
AT91SAM9M10-CU
Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM9M10-CU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
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Table 45-7.
Table 45-8.
45.6.2.5
1100
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
unpacked
Pixel 1bpp
Pixel 2bpp
Pixel 4bpp
Pixel 8bpp
Pixel
16bpp
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
unpacked
Mem Addr
Mem Addr
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
AT91SAM9M10
24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8
12
Palette
Big Endian Memory Organization (Continued)
WinCE Pixel Memory Organization
6
13
not used
not used
0x3
0x3
2
3
1
This block is used to generate the pixel gray or color information in palletized configurations. The
different modes with the palletized/non-palletized configuration can be found in
these modes, 1, 2, 4 or 8 input bits index an entry in the lookup table. The corresponding entry in
the lookup table contains the color or gray shade information for the pixel.
Table 45-9.
14
TFT
TFT
STN Mono
7
15
1
2
DISTYPE
Palette Configurations
8
4
9
0x2
0x2
Configuration
4
2
3
10
5
PIXELSIZE
1, 2, 4, 8
16, 24
1, 2
11
4
9
2
10 11 12 13 14 15 0
5
0x1
0x1
3
0
1
0
0
6
3
7
8
Palette
Palletized
Non-palletized
Palletized
0
1
7
0
6
1
0
5
2
6355B–ATARM–21-Jun-10
1
4
3
0x0
0x0
Table
5
0
2
3
4
3
2
5
45-9. In
1
1
6
3
0
7
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