AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 835

IC MCU 16/32BIT ARM9 324TFBGA

AT91SAM9M10-CU

Manufacturer Part Number
AT91SAM9M10-CU
Description
IC MCU 16/32BIT ARM9 324TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9M10-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
400MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Size
64KB (64K x 8)
Program Memory Type
ROM
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 1.1 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
324-TFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
133 MHz
Number Of Programmable I/os
5
Number Of Timers
2 x 16 bit
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
Controller Family/series
AT91
No. Of I/o's
160
Ram Memory Size
64KB
Cpu Speed
400MHz
No. Of Timers
2
Rohs Compliant
Yes
Cpu Family
AT91
Device Core
ARM926EJ-S
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
64KB
# I/os (max)
160
Number Of Timers - General Purpose
7
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.1/1.95/3.6V
Operating Supply Voltage (min)
0.9/1.65/1.8/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Package Type
TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
996
Part Number:
AT91SAM9M10-CU
Manufacturer:
Atmel
Quantity:
10 000
Figure 38-10. Data IN Followed By Status OUT Transfer at the End of a Control Transfer
Figure 38-11. Data OUT Followed by Status IN Transfer
835
USB Bus
Packets
RX_BK_RDY
(UDPHS_EPTSTAx)
TX_COMPLT
(UDPHS_EPTSTAx)
AT91SAM9M10
Token IN
USB Bus
Packets
RX_BK_RDY
(UDPHS_EPTSTAx)
TX_PK_RDY
(UDPHS_EPTSTAx)
Device Sends the Last
Data Payload to Host
Data IN
Note: A NAK handshake is always generated at the first status stage token.
Note: Before proceeding to the status stage, the software should determine that there is no risk
of extra data from the host (data stage). If not certain (non-predictable data stage length), then
the software should wait for a NAK-IN interrupt before proceeding to the status stage. This pre-
caution should be taken to avoid collision in the FIFO.
Token OUT
Set by Hardware
Host Sends the Last
Data Payload to the Device
Set by Hardware
ACK
Data OUT
Set by Firmware
Token OUT
Device Sends a
Status OUT to Host
Cleared by Firmware
Interrupt Pending
ACK
Data OUT (ZLP)
Token IN
Device Sends a Status IN
to the Host
Cleared by Firmware
Data IN
ACK
Token OUT
ACK
Set by Hardware
Clear by Hardware
Data OUT (ZLP)
Cleared by Firmware
6355B–ATARM–21-Jun-10
Interrupt
Pending
ACK

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