AT91SAM9M10-CU Atmel, AT91SAM9M10-CU Datasheet - Page 259

• Manufacturer Part Number: AT91SAM9M10-CU
• Description: IC MCU 16/32BIT ARM9 324TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9M10-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 1.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9M10-G45-EK
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Cpu Family: AT91
• Device Core: ARM926EJ-S
• Device Core Size: 32b
• Frequency (max): 400MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 160
• Number Of Timers - General Purpose: 7
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.1/1.95/3.6V
• Operating Supply Voltage (min): 0.9/1.65/1.8/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The DDRSDRC is programmed using the registers listed in
Table 22-9.
6355B–ATARM–21-Jun-10
Offset
0x00
0x58-0xE0
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x2C
0x34
0x38
0x3C
0x40
0x44
0x48-0x4C
0xE4
0xE8
Register Mapping
Register
DDRSDRC Mode Register
DDRSDRC Refresh Timer Register
DDRSDRC Configuration Register
DDRSDRC Timing0 Register
DDRSDRC Timing1 Register
DDRSDRC Timing2 Register
Reserved
DDRSDRC Low-power Register
DDRSDRC Memory Device Register
DDRSDRC DLL Information Register
DDRSDRC High Speed Register
DDRSDRC Delay I/O Register
DDRSDRC Delay I/O Register
DDRSDRC Delay I/O Register
DDRSDRC Delay I/O Register
Reserved
Reserved
Reserved
DDRSDRC Write Protect Mode Register
DDRSDRC Write Protect Status Register
Name
DDRSDRC_MR
DDRSDRC_RTR
DDRSDRC_CR
DDRSDRC_T0PR
DDRSDRC_T1PR
DDRSDRC_T2PR
–
DDRSDRC_LPR
DDRSDRC_MD
DDRSDRC_DLL
DDRSDRC_HS
DDRSDRC_DELAY1
DDRSDRC_DELAY2
DDRSDRC_DELAY3
DDRSDRC_DELAY4
–
-
–
DDRSDRC_WPMR
DDRSDRC_WPSR
Table
22-9.
Access
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
–
Read-write
Read-write
Read-only
Read-write
Read-write
Read-write
Read-write
Read-write
–
-
–
Read-write
Read-only
AT91SAM9M10
Reset
0x00000000
0x00000000
0x7024
0x20227225
0x3c80808
0x2062
–
0x10000
0x10
0x00000001
0x0
0x00000000
0x00000000
0x00000000
0x00000000
–
-
–
0x00000000
0x00000000
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